1. Real-Time Embedded Software Synthesis 即時嵌入式軟體合成 熊博安國立中正大學資訊工程學系民國九十年十一月廿九日

2. 2001/11/292 What do I want to talk about ? What is a real-time system? What is a real-time system? What is an embedded system? What is an embedded system? Why software? Why software? Why synthesis? Why synthesis? How to generate code automatically? How to generate code automatically? Real-world applications? Real-world applications? Future work? Future work?

3. 2001/11/293 What is a REAL-TIME SYSTEM? Timely Response Timely Response Predictable Response Predictable Response System Correctness: System Correctness: Timing (period, deadlines, etc.) Timing (period, deadlines, etc.) Function Function Constraints: Constraints: Hard (meet ALL deadlines) Hard (meet ALL deadlines) Soft (miss SOME deadlines) Soft (miss SOME deadlines)

4. 2001/11/294 Examples of Real-Time Systems multimedia servers automobiles air crafts telecommunications

5. 2001/11/295 What is an EMBEDDED SYSTEM? Installed in a larger system Installed in a larger system Dedicated task Dedicated task Small Memory Space (200~400 KB) Small Memory Space (200~400 KB) Low Processing Power (100~200 MHz ) Low Processing Power (100~200 MHz ) Unstable Environment (mobile, …) Unstable Environment (mobile, …) Reactive Reactive Real-Time Real-Time

6. 2001/11/296 Embedded Systems Example medical instrumentshome appliancesoffice equipments space crafts research lab equipments factory automation

7. 2001/11/297 Embedded System Architecture

8. 2001/11/298 Why SOFTWARE? more than 70% software in many real-time embedded systems!!! more than 70% software in many real-time embedded systems!!! software is more flexible and easily reconfigurable, hence more errors!!! software is more flexible and easily reconfigurable, hence more errors!!! real-time  need correct software real-time  need correct software embedded  need small, efficient software embedded  need small, efficient software

9. 2001/11/299 Why SYNTHESIS? More software  high complexity  need for automatic design (synthesis) More software  high complexity  need for automatic design (synthesis) Eliminate human and logical errors Eliminate human and logical errors Relatively immature synthesis techniques for software Relatively immature synthesis techniques for software Code optimizations Code optimizations size size efficiency efficiency Automatic code generation Automatic code generation

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13. 2001/11/2913 How to generate CODE automatically? Real-Time Embedded System Model? Set of concurrent tasks with memory and timing constraints! Real-Time Embedded System Model? Set of concurrent tasks with memory and timing constraints! How to execute in an embedded system (e.g. 1 CPU, 100 KB Mem)? Task Scheduling! How to execute in an embedded system (e.g. 1 CPU, 100 KB Mem)? Task Scheduling! How to generate code? Map schedules to software code! How to generate code? Map schedules to software code! Code optimizations? Minimize size, maximize efficiency! Code optimizations? Minimize size, maximize efficiency!

14. 2001/11/2914 Design Issues and Solutions 2. Real-Time Constraints 1. Bounded Memory Execution Quasi-Static Scheduling (QSS) Proposed Solutions Real-Time Scheduling (RTS) Hard Real-Time Firing Interval Bound Synthesis (FIBS) Soft Real-Time

15. 2001/11/2915 Real-Time Embedded System Model Time Free-Choice Petri Nets (TFCPN) Each arc from a place is either a unique outgoing arc or a unique incoming arc to a transition.

16. 2001/11/2916 Synthesis Algorithm (Hard RTES) Synthesize_Hard_RTES(S, ,  QSS = Quasi_Static_Schedule(S,  QSS = Quasi_Static_Schedule(S,  If (QSS = NULL) return MemOverFlow; If (QSS = NULL) return MemOverFlow; RTS = Real_Time_Sched(S, QSS,  RTS = Real_Time_Sched(S, QSS,  If (RTS = NULL) return RTS_Error; else Code = Code_Gen(S,QSS,RTS); If (RTS = NULL) return RTS_Error; else Code = Code_Gen(S,QSS,RTS); return Code; return Code;

17. 2001/11/2917 Synthesis Algorithm (Soft RTES) Synthesize_Soft_RTES(S, ,  QSS = Quasi_Static_Schedule(S,  QSS = Quasi_Static_Schedule(S,  If (QSS = NULL) return MemOverFlow; If (QSS = NULL) return MemOverFlow; FIB = Firing_Interv_Synth(S, QSS,  ); FIB = Firing_Interv_Synth(S, QSS,  ); If (FIB = NULL) return FIB_Error; else Code = Code_Gen(S, QSS, FIB); If (FIB = NULL) return FIB_Error; else Code = Code_Gen(S, QSS, FIB); return Code; return Code;

18. 2001/11/2918 Quasi-Static Scheduling TFCPN net decomposition Conflict-Free Components Quasi-Static Schedules Finite Complete Cycle Deadlock Free Satisfy Memory Reqts Memory OK!!!

19. 2001/11/2919 Real-Time Scheduling Single Processor Single Processor Worst Case Timing Analysis: Worst Case Timing Analysis: Rate Monotonic (RM) Rate Monotonic (RM) fixed priority fixed priority small period  high priority small period  high priority Earliest Deadline First (EDF) Earliest Deadline First (EDF) dynamic priority dynamic priority early deadline  high priority early deadline  high priority

20. 2001/11/2920 Firing Interval Bound Synthesis 2 issues in Soft Real-Time Embedded System Control: 2 issues in Soft Real-Time Embedded System Control: Synchronization Wait: (for completion of other tasks) Synchronization Wait: (for completion of other tasks) Real-Time Specification: (complete before deadlines) Real-Time Specification: (complete before deadlines) Proposed Solutions: Proposed Solutions: Postpone Release Time:    +  w,  w > 0 Postpone Release Time:    +  w,  w > 0 Advance Finish Time:      n,  n >0 Advance Finish Time:      n,  n >0

21. 2001/11/2921 Code Generation generate_code(S, QSS 1, QSS 2, …, QSS n, RTS) { generate_code(S, QSS 1, QSS 2, …, QSS n, RTS) { for i = 1, …, n { for i = 1, …, n { D i = create_process(QSS i ); D i = create_process(QSS i ); for j = 1, …, Indep_Tasks(A i ) { for j = 1, …, Indep_Tasks(A i ) { d ij = create_task(QSS i ); d ij = create_task(QSS i ); generate_task_code(d ij ); generate_task_code(d ij ); add_task(d ij, D i ); } add_task(d ij, D i ); } } } create_main(); create_main(); output “ for(i=0, i<length(RTS); i++) { ”; output “ for(i=0, i<length(RTS); i++) { ”; for k = 1, …, RTS output_code(D ik ); for k = 1, …, RTS output_code(D ik ); output “ } ”; output “ } ”; }

22. 2001/11/2922 Optimal Code Hierarchy Main Program Process i Task 1Task 2Task k … TFCPN # Tasks = # Independent Source Transitions

23. 2001/11/2923 Example S = {F 1, F 2 }

24. 2001/11/2924 Conflict Free Components for F 1 v 12 = (t 11, t 13, t 15, t 15 ) 13   (v 12 )  26 Quasi-Static Scheduling v 11 = (t 11, t 12, t 11, t 12, t 14 ) 11   (v 11 )  22

25. 2001/11/2925 Conflict Free Components for F 2 v 21 = (t 21, t 22, 2t 24, 4t 26, t 28, t 29, t 26 ) 31   (v 21 )  68 v 22 = (t 21, t 23, t 25, 2t 27, t 28, t 29, t 26 ) 15   (v 22 )  36 Quasi-Static Scheduling

26. 2001/11/2926 Real-Time Scheduling TaskPriority iiii  max (  1 )  max (  2 ) T1T1T1T111002648 T2T2T2T221106868 SchedulableYesNo Algorithms RM, EDF  1 = {v 11, v 12 }  2 = {v 12, t 11 t 12 k  v 12 t 11 t 12 t 14, k  1}

27. CASE STUDY: AN ATM VIRTUAL PRIVATE NETWORK SERVER CLASSIFIER CONGESTION CONTROL (MSD) SUPERVISOR WFQ SCHEDULER ATM IN (155 Mbit/s) ATM OUT (155 Mbit/s) DISCARDED CELLS

28. 2001/11/2928 ATM Server Example

29. 2001/11/2929 0 MSD 1 CID 2 PTI 3 t1 4 READ_STATE_VCC 7 READ_OUT_QUID 10 t2 11 t3 t4 t5 12 t6 UPDATE_STATE_INIT 13 18 12 READ_MAX_QLEN GTH 15 CHECK_QLENGTH1 18 t7 19 t6 UPDATE_STATE_INIT 12 READ_THRESHOLD 15 CHECK_QLENGTH2 18 t8 19 t10 t9 PU SH COMPUTE_OUT_TIME t12 *SCHEDULE _WFQ t10 t9 PU SH COMPUTE_OUT_TIME t12 *SCHEDULE _WFQ PU SH t11 UPDATE_STATE_REJ PU SH *SCHEDULE _WFQ COMPUTE_OUT_TIME t12 *SCHEDULE _WFQ COMPUTE_OUT_TIME t12 *SCHEDULE _WFQ UPDATE_STA TE_ACC t11 UPDATE_S TATE_REJ t6 UPDATE_STATE_INIT 20 21 21 30 431 52 20 21 26 30 36 46 37 58 25 26 31 35 41 51 42 63 25 26 26 35 4 36 57 Schedule Results: 49 markings 14 schedules 63 instructions 12 Kbytes Memory

30. 2001/11/2930 14 Schedules of MSD in ATM

31. 2001/11/2931 Conclusions Software needs to be synthesized automatically because it is getting more and more complex! Software needs to be synthesized automatically because it is getting more and more complex! Hard RTES Synthesis Method = QSS + RTS + Code-Generation Hard RTES Synthesis Method = QSS + RTS + Code-Generation Soft RTES Synthesis Method = QSS + FIBS + Code-Generation Soft RTES Synthesis Method = QSS + FIBS + Code-Generation ATM VPN Server Example shows feasibility of our approach ATM VPN Server Example shows feasibility of our approach

32. 2001/11/2932 Current and Future Work Integrate Time & Memory Scheduling Integrate Time & Memory Scheduling A general Petri Net system model A general Petri Net system model Java Implementation: install into embedded systems such as PDA for dynamic code change and management by user (web computing) Java Implementation: install into embedded systems such as PDA for dynamic code change and management by user (web computing) C Code Generation: for embedding into prototyping systems such as SoC design and verification platform C Code Generation: for embedding into prototyping systems such as SoC design and verification platform