1. Purpose This course discusses techniques that are used to analyze and eliminate noise in embedded microcontroller and microprocessor systems. Objectives Learn how use a Workbench Faraday Cage (WBFC) and a hybrid balun to measure common-mode emissions. Understand benefits of using a low-noise MCU. Gain knowledge about a technique for reducing common-mode emissions from PCB supply lines. Learn how the common-mode noise reduction technique can be applied to LSI packages and circuit board power distribution lines. Content 17 pages Learning Time 30 minutes Course Introduction

2. Reducing EMI EMI reduction is a goal shared by both the semiconductor experts who design MPUs and other LSI devices, and by the engineers who apply those chips in embedded systems ECU Electronic Control Unit EMI Electromagnetic Interference Explanation of Terms A microcontroller chip is composed of a core, I/O ports, and power supply circuitry. The core consists of the CPU, ROM, RAM, and blocks implementing timers, communication, and analog functions. Power supply Two power supplies are applied to the LSI: Vcc and Vss. The core power supply internal to the LSI is VCL (internal step-down). The Vss-based power supply routed through the LSI is VSL. Harness Cables (wires) connecting a board and power supply or connecting one unit in a system to another Balun LISN TEM Cell WBFC Core A room designed to block radiation from the outside and to minimize reflections off the room’s walls, ceiling, and floor A passive electronic device that converts between balanced and unbalanced electrical signals CISPR 25 International Special Committee on Radio Interference (CISPR) publication 25: “Limits and methods of measuring radio disturbance characteristics for the protection of receivers on board vehicles.” CISPR is a sub-committee of the International Electrotechnical Commission (IEC). Line Impedance Stabilization Network Transverse Electromagnetic Cell Workbench Faraday Cage Anechoic chamber

3. Emission-measurement Standards The international standards listed here are used to measure electromagnetic emissions* from MCUs and other ICs Standard No.: Title Latest Standard Document Issue DateRemarks IEC 61967-1: General conditions and definitions2002-03-12IS[IEC 61967-1] IEC 61967-2: Measurement of radiated emissions, TEM-cell and wideband TEM-cell Method 2005-09IS[IEC 61967-2] 2005-06TS[IEC TS 61967-3] 2002-04-30 IS [IEC 61967-4] 2002-06-25IS[IEC 61967-6] IEC 61967-3: Measurement of radiated emissions, Surface Scan-method (Technical Specifications) IEC 61967-4: Measurement of conducted emissions, 1-ohm/50-ohm Direct Coupling Method [IEC 61967-4 Ed. 1.1] 2006-2007 Edition 1.1 2003-01-17 IS [IEC 61967-5] IEC 61967-5: Measurement of conducted emissions, Workbench Faraday Cage Method IEC 61967-6: Measurement of conducted emissions, Magnetic Probe Method IS: IEC International Standard TS: Technical Specification *Measurement range: 150kHz to 1GHz

4. Workbench Faraday Cage Used to measure common-mode voltage at Vss points on PCB modules - Obtains results similar to CISPR-25 or antenna techniques performed in an anechoic chamber u Vcc vnvn Typical Test SetupBlock Diagram Common-mode voltage, u, is very small

5. Conventional microcontroller (XY) Measuring Common-mode Voltage Photos show 2-layer evaluation boards illuminated from below XY Vcm (Gnd) measurement point Reduced-noise microcontroller (RN) RN The WBFC method was used to compare two MCUs under identical conditions with no ground plane, no nearby bypass capacitor, and a long signal cable Vcm (Gnd) measurement point

6. WBFC Evaluation Results Only CPU core operating (CAN and ports stopped) CPU and CAN operating (Ports stopped) CPU, CAN and ports operating (Ports stopped) Evaluated at power supply pins Common-mode noise of RN MCU is much less than that of XY device FM band 500 kHz, 1 line FM band Conventional MCU (XY) Reduced-noise MCU (RN)

7. Measuring Vector Sum, Difference Using a Faraday cage and a hybrid balun, measurements of both common-mode and differential-mode emissions can be made SUMISO 0°180° - + + + Hybrid Balun Spectrum Analyzer Terminator Vcm (Vcc) Vcc + Vss WBFC ISO port SUM port 180° Hybrid balun 0° port 180° port Vcm (Vss) Common-mode Test Setup 180° Hybrid balun WBFC Vcc - Vss 180° Hybrid balun Vcm (Vcc)Vcm (Vss) Differential-mode Test Setup

8. Data from Test of XY MCU Test conditions: CAN and ports stopped. Cable constantly connected to Vcc and Gnd (Vss) power supply pins. A 50Ω terminator connected to Gnd during Vcc measurement and to Vcc during Vss measurement. Same cable lengths used for Vcc (+/-) Vss measurements. ISO and SUM output measured with hybrid balun connected (output under measurement terminated). Combined noise from XY chip is the same as levels at Vcc and Vss points - Noise in key bands (FM, etc.) could be a problem Vss Vcc - Vss Level Frequency Vcc Vcc + Vss FM band Level Frequency Attenuation approximately the same as Vcc or Gnd alone Data for XY MCU

9. Results from Reduced-noise MCU RN MCU’s combined noise is less than levels at Vcc and Gnd points - Balanced pin layout reduces common-mode noise Vcc Vcc + Vss FM band Level Frequency Attenuation greater than Vcc or Gnd alone (phase difference nearly 180°) Data for RN MCU Vss Attenuation greater than Vcc or Gnd alone Level Frequency RN MCU Vcc - Vss Data for RN MCU Test conditions: CAN and ports stopped. Cable constantly connected to Vcc and Gnd (Vss) power supply pins. A 50Ω terminator connected to Gnd during Vcc measurement and to Vcc during Vss measurement. Same cable lengths used for Vcc (+/-) Vss measurements. ISO and SUM output measured with hybrid balun connected (output under measurement terminated).

10. Minimizing CM Radiation — 1 A step-by-step investigation was conducted to find ways to minimize common-mode noise Computer Simulations Made with Different Parameters Data from Simulation Circuit Diagram MCU Parasitic Capacitance Bypass Capacitor Printed Circuit Board Wire Harness Breakthrough Current Equivalent Circuit

11. Minimizing CM Radiation — 2 Analysis of data from a simulator revealed that emissions are minimized when a balance of impedances is achieved Computer Simulations Made with Different Parameters Data from Simulation Data Analysis [Conclusion: Noise is minimized when LvCv = LgCg] Circuit Diagram MCU Parasitic Capacitance Bypass Capacitor Printed Circuit Board Wire Harness Breakthrough Current Equivalent Circuit

12. Minimizing CM Radiation — 3 Subsequent R&D found practical ways to implement designs that produced significantly lower amounts of common-mode emissions Circuit Diagram Equivalent Circuit Computer Simulations Made with Different Parameters Data from Simulation Data Analysis [Conclusion: Noise is minimized when LvCv = LgCg] Overall conclusion: To minimize common- mode current and noise, the impedances of the Vcc and Vss lines must be balanced Design and testing of various boards to check theory against reality and create practical implementations MCU Parasitic Capacitance Bypass Capacitor Printed Circuit Board Wire Harness Breakthrough Current Information about this research was presented at the following events: Conference of Japan Institute of Electronics Packaging (Mar 22-24, 2006) IEEE EMC Symposium (Aug. 14-18, 2006), Portland, OR IEEE EMC Symposium (July. 8-13, 2007), Honolulu, HI - 20dB reductions are possible

13. Low-noise Board Layout Same noise-reduction-method can be applied to the pc board layout used to connect an LSI device Experiments were conducted to test the method -Supply and ground wiring connections to the package of an H8S/2134 MCU were changed -The redesign achieved a balanced layout -Emissions tests were conducted on ECU boards with unbalanced and balanced supply and ground layouts to determine the amount of noise reduction obtained H8S/2134 Red=Vcc Blue=Vss Balanced layout of power and ground wiring on pc board

14. Unbalanced vs. Balanced Layout Balanced board layout achieved 20dB noise reduction in the FM band For much of the frequency range, the emission levels from the board with the balanced layout are no greater than the system dark noise Test method: CISPR 25, automotive-specification equivalent -140 -130 -120 -110 0326496128160192 Frequency (MHz) Noise Level (dBµA) Conventional supply/ground board layout Conventional supply/ground board layout –20dB reduction FM band Noise floor Balanced layout Noise Level vs. Frequency

15. Setup for CISPR-25 test ECU board, harness, LISN, and battery were laid out on a wooden bench in a shielded enclosure Test bench

16. Common-mode Current The amount of common-mode current (Icm, yellow arrow) equals the difference between Ig (blue arrow) and Iv (red arrow)

17. Changing the Supply Lines The patterns used for supply lines were systematically varied to create seven different patterns on two-layer boards - These figures show patterns 1 and 2 Pattern 1Pattern 2 2

18. Simulation: Vcc & Vss Patterns Simulation showed that in Pattern 1 the common-mode voltage swing of Vss was opposite the swing of Vcc but larger, an unbalance that caused emissions in the wiring harness In Pattern 2, the swing of Vss was equal and opposite to that of Vcc, thus minimizing the common-mode voltage and current — and the resulting emissions from the harness Pattern 1Pattern 2 Vss (Gnd) side Vcc (high) side Vss (Gnd) side Vcc (high) side

19. Compensating for Cv/Cg Imbalance If Cg > Cv, inductance can be inserted into the supply line to decrease common-mode emissions To compensate for a large Cv, increase Lv to make v = LC vg LC g Test conditions: L v = 10nH = inductance of supply wiring on the PCB C v = 0.45pF = parasitic capacitance of supply wiring L g = 2nH = inductance of ground-side wiring C g := 4.55pF = parasitic capacitance of ground-side wiring Problem: With Lv = 10nH, Lg = 2nH, Cv = 0.45pF and Cg = 4.55pF, common-mode noise was too high 20dB reduction Test results when Cv = Cg = 2.5pF

20. Copper foil added Common-mode Current [dBµA] Compensating for Cv/Cg Imbalance Design approach was verified by finding a minimum in the CM current when the area of Vcc pattern — and thus, Cv — was changed Problem: With Lv = 10nH, Lg = 2nH, and Cg = 4.55pF, find value of Cv that minimizes common-mode current If Cg is too big, increase Cv by adding pattern area. Back side of printed circuit board - Location of expanded foil area is important. Added Pattern Area [mm 2 ] Common-mode Current vs. Pattern Area

21. Use of the Workbench Faraday Cage and hybrid balun Emissions of conventional microcontroller versus reduced-noise MCU Technique for reducing common-mode emissions from PCB supply lines by achieving balanced impedances Application of the CM noise reduction-method to the package for a microcontroller Tests showing the effectiveness of the technique for reducing common-mode noise Course Summary For more information on specific devices and related support products and material, please visit our Web site: http://america.renesas.com