1. MIMOSA-26 and its readout
The NA-61 Vertex Detector – Electronics and readout
MIMOSA-26 and its readout
M. Deveaux, Goethe University Frankfurt

2. M. Deveaux, NA-61 Collaboration Meeting, May 2013
Who am I ?
Name:
Dr. Michael Deveaux
Goethe University Frankfurt
Scientific interests:
CBM – MVD and Open Charm Physics
CMOS Monolithic Active Pixel Sensors
… the NA61-MVD
with Marc Winter, IPHC
Since with Prof. Joachim Stroth
Since HIC for FAIR -
Junior group leader
M. Deveaux, NA-61 Collaboration Meeting, May 2013

3. M. Deveaux, NA-61 Collaboration Meeting, May 2013
What is the topic ?
What are the properties of the MIMOSA-26 sensors?
Is MIMOSA-26 suited to measure open charm with NA-61?
M. Deveaux, NA-61 Collaboration Meeting, May 2013

4. Open charm physics – NA61 vs. CBM
[W. Cassing, E. Bratkovskaya, A. Sibirtsev, Nucl. Phys. A 691 (2001) 745]
SIS18
SIS100
SIS300
SPS
NA-61~ 0.1 D/coll.
CBM ~ 10-4 D/coll.
MIMOSA-26 matches the needs for SPS, not for FAIR
=> CBM and NA61 are complementary.
M. Deveaux

5. Requirements on an NA-61 MVD
Primary Beam: ~150 AGeV Au Ions (~ 105/s)
Primary
vertex
Secondary
Short lived particle
D0 (ct = ~ 120 µm)
Detector 1
Detector2
Target
(Gold) z
All numbers extrapolated
from CBM simulations
Reconstructing open charm requires:
Excellent secondary vertex resolution (~ 50 µm)
=> Excellent spatial resolution (~5 µm)
=> Very low material budget (few 0.1 % X0)
Good radiation tolerance
Time resolution to separate 2000 coll/s => ~ 100 µs
M. Deveaux

6. Requirements vs. sensors
NA-61
Hybrid
CCD
MIMOSA-26
Resolution
< 5 µm
30 µm
<5 µm
3.5 µm
Material Budget
few 0.1 X0
~ 1% X0
~0.1% X0
0.05% X0
Rad. Tol. (1)
3x1010neq/cm²
>1014 neq/cm²
<109 neq/cm²
>1013 neq/cm²
Rad. Tol. (2)
~1 krad
>10 Mrad
~1 Mrad
> 300krad
Time res.
~100 µs
20 ns
~ 100 µs
115.2 µs
(1) non ionizing dose per week beam on target
(2) ionizing dose per week beam on target
All numbers extrapolated from CBM simulations assuming 2000 Au+Au coll./s

7. CMOS-MAPS, the fundamentals
Monolithic Active Pixel Sensors
(MAPS, also CMOS-Sensors)
Invented by industry (digital camera)
Modified for charged particle detection by the PICSEL group, IPHC Strasbourg
Selected communities participating in MAPS R&D
TESLA ILC Vertex
STAR HFT
CBM MVD
AIDA
EU-DET
ALICE ITS
2000
2005
2010

8. MIMOSA-26: The operation principle
+3.3V
Reset
+3.3V
Output
SiO2
SiO2
SiO2
N++
N++ N+ P+
50µm P-
15µm P+
M. Deveaux

9. Offline Cluster finding
Pixel readout concept
Offline Cluster finding
Sensor
External ADC
Output
Add pedestal correction
~1000 discriminators
On - chip cluster-finding processor
Output: Cluster information
(zero surpressed)
MAPS are built in CMOS
technology
Allows to integrate:
sensor
analog circuits
digital circuits
on one chip.

10. Block diagram of MIMOSA-26
8 x analog out (obsolet)
Readout
sequencer
Sensor array (21200 x µm²)
Coll. discri-
minators
Slow control
interface (JTAG)
Zero suppr.
computer
Output
memory
Bias DACs (Threshold
generation…)
M. Deveaux, NA-61 Collaboration Meeting, May 2013

11. M. Deveaux, NA-61 Collaboration Meeting, May 2013
Interface of MIMOSA-26
JTAG clk
JTAG in
JTAG out
Vdd (3.3V)
VddA (3.3V)
VCmp (~ 2V)
Clk (80 MHz)
Start (digital)
Data (2 x 80 MHz)
Data Clk
Temp in
Temp out
GND
Relatively simple interface (~50 pins for > pixels)
M. Deveaux, NA-61 Collaboration Meeting, May 2013

12. Native data encoding of MIMOSA-26
Q. Li 1 S4 S5 S2 S3 S0 S1
SL0
SL1
SL2
Readout direction
State: “Status/Line”
(for each line containing a fired pixel)
M. Deveaux, NA-61 Collaboration Meeting, May 2013

13. Native data encoding of MIMOSA-26
Q. Li 1 S4 S5 S2 S3 S0 S1
SL0
SL1
SL2
Readout direction
“State”-Up to 4 consecutive fired pixels
M. Deveaux, NA-61 Collaboration Meeting, May 2013

14. Limitations of data encoding…
18 banks (64 cols.)
Max. 6 states/bank
Max. 9 states/row
Output Buffer
Max. 2x 570 states
80 Mbps
80 Mbps
Overflow concept: Truncate and indicate
M. Deveaux, NA-61 Collaboration Meeting, May 2013

15. A comment on the synchronization of the readout
Sensors:
Run freely and contineously
Cannot react on trigger
Provide internal time information
Deterministic data push interface
FPGA-Boards:
Reduce data (remove idle bits)
May handle trigger requests
Check synchronization
Handle network issues
Proposed hardware platform:
GSI TRB-3 board
M. Deveaux, NA-61 Collaboration Meeting, May 2013

16. The readout system (CBM-MVD Prototype)
B. Milanovic
DAQ
Ethernet
TrbNet
TRB-board
Customized
Sensors
12 Sensors
M. Deveaux, NA-61 Collaboration Meeting, May 2013

17. The readout chain (CBM-MVD prototype)
C. Schrader, B. Neumann, M. Koziel, IKF Frankfurt
M. Deveaux, NA-61 Collaboration Meeting, May 2013

18. M. Deveaux, NA-61 Collaboration Meeting, May 2013
The readout chain II
3x JTAG chain
Controller
TDO
B. Milanovic
3x JTAG, SRC
MAIN
Board
JTAG Chain 1
one clock
one START
JTAG Chain 2
JTAG Chain 3
TRB2 + GPAddon
Patch Panel
M. Deveaux, NA-61 Collaboration Meeting, May 2013

19. Summary and conclusion
MIMOSA-26 matches the requirements for an NA-61 MVD
1152x576 pixels (2 cm²), 18.4 µm pitch
115 µs frame rate
50 µm (Si) thickness=> 0.05 X0
On-chip discriminators provide digital high level protocol
Stable readout has been demonstrated with TRB-FGPA boards
Further reading:
The MIMOSA-26 manual:
General performance:
Data sparsification: A. Himmi et al,
Radiation tolerance: M. Deveaux et al, 2011 JINST 6 C02004,doi: / /6/02/C02004
M. Deveaux, NA-61 Collaboration Meeting, May 2013

20. It’s no science fiction
The CBM-MVD prototype:
Based on MIMOSA-26
Vacuum compatible cooling support (CVD diamond)
Material budget: <0.3% X0 (incl. two silicon layers and support)
Results from SPS-beam test:
MIP efficiency: > 99 %
Spatial resolution: ~ 4 µm
M. Deveaux, NA-61 Collaboration Meeting, May 2013

21. Latch-up – a radiation induced, reversible short circuit
Latch-up may occure if particles hit sensitive structures like CMOS-Inverters.
The structures of the inverter act as parasitic thyristor, which is switched on
=> Short circuit in the device
M. Deveaux, NA-61 Collaboration Meeting, May 2013

22. Latch-up – a radiation induced, reversible short circuit
If no action is undertaken, the device is destroyed by over-current (thermal overload).
IC affected by latch - up
Detecting the over current and performing power cycling solves the problem (thyristor is switched off).
M. Deveaux, NA-61 Collaboration Meeting, May 2013

23. M. Deveaux, NA-61 Collaboration Meeting, May 2013
Latch-up
Mi26- computer
Computer
Mi26- sensors
Not Mimosa-26
Sensor
„May 2009 Latch up tests - report ”
Michal Szelezniak, Leo Greiner
Sensors must be protected against latch-up
M. Deveaux, NA-61 Collaboration Meeting, May 2013