1. Organizational Remarks
I don’t use the exercises in Mano/Kime; this way you can use them as review exercises (for many of them there are solutions on the web:
Digital Techniques Fall 2007 André Deutz, Leiden University

2. Digital Techniques Fall 2007 André Deutz, Leiden University
Remarks
Two’s complement
For the math minded, otherwise ignore:
Boolean ring is not a Boolean algebra;
given a Boolean ring you can equip it with a Boolean algebra structure (and conversely):
a ∧ b := ab (AND)
a ∨ b := a+b – ab (OR)
a’ := 1 + a (NOT)
Digital Techniques Fall 2007 André Deutz, Leiden University

3. Digital Techniques Fall 2007 André Deutz, Leiden University
Remarks
For the math minded, otherwise ignore:
given a Boolean algebra you can equip it with a Boolean ring structure:
xy := x ∧ y,
x + y := (x ∨ y) ∧ ~(x ∧ y).
(∧ =AND, ∨=OR, ~=NOT; the given operations of the Boolean algebra)
Digital Techniques Fall 2007 André Deutz, Leiden University

4. Logic diagrams, Boolean expressions, and Truth(1/0) Tables
LDs BEs  TTs
Digital Techniques Fall 2007 André Deutz, Leiden University

5. Digital Techniques Fall 2007 André Deutz, Leiden University
Logic diagrams (LDs), Boolean Expressions (BEs), and Truth Tables (TTs) (or 1/0-tables)
The object which is lurking behind the scenes is of the course the notion of a Boolean logic function (or for short: a Boolean function): a Boolean function of n variables is a mapping from the set {0,1}n to the set {0,1}. (What do you mean by {0,1}n ? … )
Of course, a Boolean function is completely determined by a Truth table (1/0-table)
Digital Techniques Fall 2007 André Deutz, Leiden University

6. Digital Techniques Fall 2007 André Deutz, Leiden University
LDs, BEs, and TTs
LDs BEs  TTs
Each Boolean function has a unique TT
In general: a Boolean function or a TT can have more than one LD (or for that matter BE) associated to it.
For any two of (LD, BE, TT) can readily go back and forth
Digital Techniques Fall 2007 André Deutz, Leiden University

7. Digital Techniques Fall 2007 André Deutz, Leiden University
LDs, BEs, and TTs
For any two of (LD, BE, TT) can readily go back and forth
From TT to BE: for each 1 in the output introduce an appropriate minterm (a product term which
contains each of the variables or their negation), then S is the
sum of these minterms: A B
Cin 1 S 1
A’B’C
A’BC’
AB’C’
ABC
S = A’B’C +A’BC’ + AB’C’ + ABC
Digital Techniques Fall 2007 André Deutz, Leiden University

8. Digital Techniques Fall 2007 André Deutz, Leiden University
LDs, BEs, and TTs; BE  TT
S = A’B’C +A’BC’ + AB’C’ + ABC
How do you get the Truth Table (1/0-table)? Etc.
We have done also the transition from TT to LD. Given the LD it is not difficult to come up with the TT.
It is also not difficult to imagine how you would go directly from LD to BE and vice versa.
Make sure that you are conversant with all possible transitions
Digital Techniques Fall 2007 André Deutz, Leiden University

9. Reduction (Simplification) of Boolean Expressions
• It is usually possible to simplify the canonical SOP (or POS) forms.
• A smaller Boolean equation generally translates to a lower gate count in the target circuit.
• We cover three methods: algebraic reduction, Karnaugh map reduction, and tabular (Quine- McCluskey) reduction.
Digital Techniques Fall 2007 André Deutz, Leiden University

10. Reduced Majority Function Circuit
• Compared with the AND-OR circuit for the unreduced majority function, the inverter for C has been eliminated, one AND gate has been eliminated, and one AND gate has only two inputs instead of three inputs. Can the function by reduced further? How do we go about it?
Digital Techniques Fall 2007 André Deutz, Leiden University

11. Digital Techniques Fall 2007 André Deutz, Leiden University
The Algebraic Method
• Consider the majority function, F. We apply the algebraic method to reduce F to its minimal two-level form:
Digital Techniques Fall 2007 André Deutz, Leiden University

12. An Aside from Alfred Tarski
What did you mean in high school by the following statement: (a+b)(a-b) = a2 – b2?
As such it can be confusing; it is not an equation but an identity; the following is much better:
For all a in R, for all b in R [(a+b)(a-b) = a2 – b2 ]; R stands for the real numbers.
And so it goes when we say in Boolean algebra context: aa=a. We mean: For all a in B={0, 1} [aa =a]
Digital Techniques Fall 2007 André Deutz, Leiden University

13. An Aside from Alfred Tarski
And so it goes when we say in Boolean algebra context: aa=a. We mean: For all a in B={01,} [aa =a]
Or another example:
a’bc+ab’c+abc’+abc = bc+ac+ab (pertains to the majority function)
Let B={0,1}.
For all a in B, for all b in B, for all c in B: [a’bc+ab’c+abc’+abc = bc+ac+ab]
Or say: 3) is shorthand for 5)
Digital Techniques Fall 2007 André Deutz, Leiden University

14. Digital Techniques Fall 2007 André Deutz, Leiden University
The Algebraic Method
• This majority circuit is functionally equivalent to the previous majority circuit, but this one is in its minimal two-level form:
Digital Techniques Fall 2007 André Deutz, Leiden University

15. Karnaugh Maps: Venn Diagram Representation of Majority Function
• Each distinct region in the “Universe” represents a minterm.
• This diagram can be transformed into a Karnaugh Map.
Digital Techniques Fall 2007 André Deutz, Leiden University

16. K-Map for Majority Function
• Place a “1” in each cell that corresponds to that minterm.
• Cells on the outer edge of the map “wrap around” B A C
Digital Techniques Fall 2007 André Deutz, Leiden University

17. Adjacency Groupings for Majority Function
Slightly different
bookkeeping
(no conceptual change): C 1 2 4 3 5 6 7 A B
B C B C A 2 6 4 1 3 5 7 B
B C A 00 01 11 10 1 1 3 2
• F = BC + AC + AB 1 4 5 7 6 1 A
Digital Techniques Fall 2007 André Deutz, Leiden University C

18. Minimized AND-OR Majority Circuit
• F = BC + AC + AB
• The K-map approach yields the same minimal two-level form as the algebraic approach.
Digital Techniques Fall 2007 André Deutz, Leiden University

19. Digital Techniques Fall 2007 André Deutz, Leiden University
K-Map Groupings
• Minimal grouping is on the left, non-minimal (but logically equivalent) grouping is on the right.
• To obtain minimal grouping, create smallest groups first. B A D C
Digital Techniques Fall 2007 André Deutz, Leiden University

20. K-Map Corners are Logically Adjacent
Slightly different
bookkeeping
(no conceptual change): B AB CD 00 01 11 10 C A D 1 A D C B 1
F = B C D + B D + A B
Digital Techniques Fall 2007 André Deutz, Leiden University

21. Digital Techniques Fall 2007 André Deutz, Leiden University
K-Maps and Don’t Cares
• There can be more than one minimal grouping, as a result of don’t cares.
Digital Techniques Fall 2007 André Deutz, Leiden University

22. Digital Techniques Fall 2007 André Deutz, Leiden University
Five-Variable K-Map
• Visualize two 4-variable K-maps stacked one on top of the other; groupings are made in three dimensional cubes.
Digital Techniques Fall 2007 André Deutz, Leiden University

23. Six-Variable K-Map
• Visualize four 4-variable K-maps stacked one on top of the other; groupings are made in three dimensional cubes.

24. Minimization (mainly 2-level circuits)
K-maps (more elaborately)
Quine-McCluskey Algorithm
Digital Techniques Fall 2007 André Deutz, Leiden University

25. Digital Techniques Fall 2007 André Deutz, Leiden University
Minimization
With respect to minimizing logic, there are several parameters that can be used
For instance: the number of gates
less cost
Less area on a chip
Less power requiremen
Less heat dissipation
More reliability
We can also use total number of gate inputs (including inverters: GN) (since the cost of the gate and the associated wiring increases with the number of inputs; wiring: effects speed and chip area)
Number of literals (see slide 32)
Digital Techniques Fall 2007 André Deutz, Leiden University

26. Digital Techniques Fall 2007 André Deutz, Leiden University
Minimization
GN Example: A`B`CD`+ A`B`CD+ A`BC`D`+ A`BC`D+ AB`CD+ ABC`D`+ ABC`D+ ABCD; 4 for inverters (one for each input variable, 8*4 for AND-gates, and 8 for the final OR-gate, a total of 44; (i.e., GN=44); the number of gates is 13 (8 ANDs, 1 OR, and 4 NOTs)
Definition: A Boolean SoP form is said to be minimal if it contains a minimal number of product terms and literals – note that the definition involves two criteria.
A minimum SoP form corresponds to a two level logic circuit having the fewest gates and the fewest number of gate inputs
Digital Techniques Fall 2007 André Deutz, Leiden University

27. Digital Techniques Fall 2007 André Deutz, Leiden University
Minimization
Fortunately we can work with one criterion – the number of gate inputs: we seldom encounter functions where the implementation with the smallest number of gate inputs, for example, is not also the implementation with the smallest number of gates
Secondly we can have more than one minimum:
f(A,B,C) = ABC+A`BC+ABC`+A`B`C+AB`C`+A`B`C`
Equivalently: AC`+A`C+BC+B`C`
And equivalently: AB+BC+B`C`+A`B`
Digital Techniques Fall 2007 André Deutz, Leiden University

28. Digital Techniques Fall 2007 André Deutz, Leiden University
Irredundant Form
An irredundant form is a logic expression of which no part can be deleted without changing the function that corresponds to it (sort of a “locally” mininum )
For instance: a SoP (Sum-of-Products) expression is irredundant if the deletion of any p-term or the deletion of any literal in any p-term changes the function (corresponding to the original SoP).
Conversely: A SoP expression is redundant if it is possible to delete some literal or some product term without changing the corresponding function.
Digital Techniques Fall 2007 André Deutz, Leiden University

29. Example of Irredundant SoP
Consider the f(A,B,C) = A`C`+A`BC+AC+AB`+B`C`
Applying consensus thm we see: A`C`+AB`+B`C`=A`C`+AB` so the last term in f B`C` -- can be deleted:
f(A,B,C) = A`C`+A`BC+AC+AB`= A`(C`+BC)+AC+AB`=A`(C`+B)+AC+AB` =A`C`+A`B+AC+AB` (1)
This is expression is irredundant (= deletion of any p-term or the deletion of any literal in any p-term changes the function)
Is A`C`+A`B+AC+AB`minimal SoP expression? NO!!!! : f(A,B,C) is also equal to A`C`+BC+AB` (2)
Can be deleted
Can be deleted
Digital Techniques Fall 2007 André Deutz, Leiden University

30. Example of Irredundant SoP (cont’d)
f(A,B,C) =A`C`+A`B+AC+AB` (1) f(A,B,C) is also equal to A`C`+BC+AB` (2)
(1) and (2) are irredundant, (2) cannot be obtained from (1); (2) is minimal
Digital Techniques Fall 2007 André Deutz, Leiden University

31. Minimization (connection with book)
Description of cost criteria in the book:
Literal cost (L): all gate inputs from outside the circuit
Gate input cost (G): all gate inputs from within the circuit, except for those to inverters
Gate input cost with NOTs (GN): same as G plus inputs which need to be complemented
Digital Techniques Fall 2007 André Deutz, Leiden University

32. Literal Cost Literal – a variable or its complement
Literal cost – the number of literal appearances in a Boolean expression corresponding to the logic circuit diagram
F=BD+AB`C+AC`D` L = 8
F=BD+AB`C+AB`D`+ABC` L= ?
F=(A+B)(A+D)(B+C+D`)(B`+C`+D) L=?
Which solution is best?
Digital Techniques Fall 2007 André Deutz, Leiden University
Digital Techniques Fall 2007 André Deutz, Leiden University

33. Digital Techniques Fall 2007 André Deutz, Leiden University
Gate Input Cost
Gate input costs - the number of inputs to the gates in the implementation corresponding exactly to the given equation or equations. (G - inverters not counted, GN - inverters counted)
For SOP and POS equations, it can be found from the equation(s) by finding the sum of:
all literal appearances
the number of terms excluding single literal terms,(G) and
optionally, the number of distinct complemented single literals (GN).
F=BD+AB`C+AC`D` G = 8. GN=11
F=BD+AB`C+AB`D`+ABC` G= ?, GN=?
F=(A+B)(A+D)(B+C+D`)(B`+C`+D) G=?, GN=?
Which solution is best?
Digital Techniques Fall 2007 André Deutz, Leiden University

34. Cost Criteria (example)
GN = G + 2 = 9
GN(gate input count with NOTs) adds the inverter inputs
Example 1:
F = A + B C +
L = 5
L (literal count) counts the AND inputs and the single literal OR input. B C
G = L + 2 = 7
G (gate input count) adds the remaining OR gate inputs A B C F
Digital Techniques Fall 2007 André Deutz, Leiden University

35. Cost Criteria (example)B C F
Example 2:
F = A B C +
L = 6 G = 8 GN = 11
F = (A + )( + C)( + B)
L = 6 G = 9 GN = 12
Same function and same literal cost
But first circuit has better gate input count and better gate input count with NOTs
Select it! A B C C B A F A B C
Digital Techniques Fall 2007 André Deutz, Leiden University

36. Digital Techniques Fall 2007 André Deutz, Leiden University
Minimization
NB: we concentrate on 2-level circuit minimization (minimization corresponding to SoPs (PoSs))
Digital Techniques Fall 2007 André Deutz, Leiden University

37. Simplifying a Boolean Function using 2-variable K-map (examples)
Given functions: 1 Y X
Simplified functions:
F1(X,Y) = Σm(0,1) = = X’Y’ + X’Y
F1(X,Y) = X’ X 1 Y
F2(X,Y) = Σm(0,3) = = X’Y’ + XY
F2(X,Y) = X’Y’ + XY 1 Y X
F3(X,Y) = Σm(0,2,3) = = X’Y’ + XY’ + XY
F3(X,Y) = X + Y’ Y 1
F4(X,Y) = Σm(0,1,2,3) = = X’Y’ + X’Y + XY’ + XY 1 1
F4(X,Y) = 1 1 1 1
Digital Techniques Fall 2007 André Deutz, Leiden University

38. Simplifying a Boolean Function using 3-variable K-map (groupings)
minterm 1 00 01 11 10 m0 m1 m3 m2 X m4 m5 m7 m6 Y Z m0 m1 m3 m2 m4 m5 m7 m6
Group of 2 adjacent cells gives product term of two literals. XZ
XZ’
X’Z’ 00 01 11 10 m0 m1 m3 m2 X 1 m4 m5 m7 m6 Y Z YZ
Y’Z
X’Z XY
XY’
X’Y’ 00 01 11 10 m0 m1 m3 m2 X 1 m4 m5 m7 m6 Y Z
X’Y
Group of 4 adjacent cells gives product term of one literals. Z X Z’ 00 01 11 10 m0 m1 m3 m2 1 m4 m5 m7 m6 Y X’ Y’ 00 01 11 10 m0 m1 m3 m2 X 1 m4 m5 m7 m6 Y Z
Digital Techniques Fall 2007 André Deutz, Leiden University

39. Simplifying a Boolean Function using 3-variable K-map (examples)YZ X 1 00 01 11 10 Y Z
Given functions:
Simplified functions:
F1(X,Y,Z) = Σm(1,2,4,7)
Simplification is
not possible YZ X 1 00 01 11 10 Y Z
F2(X,Y,Z) = XY’ + X’Y
F2(X,Y,Z) = Σm(2,3,4,5) YZ X 1 00 01 11 10 Y
F3(X,Y,Z) = Σm(0,2,4,6)
F3(X,Y,Z) = Z’ Z Y YZ 00 01 11 10 X 1 1 1 1
F4(X,Y,Z) = Σm(0,1,2,3,4,6,7)
F4(X,Y,Z) = X’ + Y X 1 1 1 Z
Digital Techniques Fall 2007 André Deutz, Leiden University

40. Simplifying a Boolean Function using 3-variable K-map (more examples)
Given functions: YZ Y
Simplified functions: 00 01 11 10 X 1
F5(X,Y,Z) = Σm(3,4,6,7)
F5(X,Y,Z) = XZ’ + YZ X 1 1 1 1 Z Y YZ 00 01 11 10 X 1 1
F6(X,Y,Z) = Z’ + XY’
F6(X,Y,Z) = Σm(0,2,4,5,6) 1 1 1 1 X Z YZ Y 00 01 11 10 X
F7(X,Y,Z) = Z + X’Y 1 1 1
F7(X,Y,Z) = Σm(1,2,3,5,7) 1 1 1 X
F8(X,Y,Z) = XZ’+X’Z +Y’Z or
F8(X,Y,Z) = XZ’+X’Z +XY’
Not unique solution Z Y YZ 00 01 11 10 X 1 1
F8(X,Y,Z) = Σm(1,3,4,5,6) 1 1 X 1 1 Z
Digital Techniques Fall 2007 André Deutz, Leiden University

41. Digital Techniques Fall 2007 André Deutz, Leiden University
Simplifying a Boolean Function using 4-variable K-map (grouping examples)
Group of 2 adjacent cells gives product term of 3 literals.
Group of 4 adjacent cells gives product term of 2 literals. YZ WX 00 01 11 10 W Y Z X m0 m1 m3 m2 m4 m5 m7 m6
m12
m13
m15
m14 m8 m9
m11
m10 YZ WX 00 01 11 10 W Y Z X m0 m1 m3 m2 m4 m5 m7 m6
m12
m13
m15
m14 m8 m9
m11
m10
W’X’Z’
X’Z’
W’YZ
W’Y’ WY
WXY
X’Y’Z
Group of 8 adjacent cells gives product term of 1 literals.
Group of all cells gives constant one. Z’ 1 YZ WX 00 01 11 10 W Y Z X m0 m1 m3 m2 m4 m5 m7 m6
m12
m13
m15
m14 m8 m9
m11
m10 YZ WX 00 01 11 10 W Y Z X m0 m1 m3 m2 m4 m5 m7 m6
m12
m13
m15
m14 m8 m9
m11
m10 W
Digital Techniques Fall 2007 André Deutz, Leiden University

42. Simplifying a Boolean Function using 4-variable K-map (examples)1 Z YZ WX 00 01 11 10 Y X W 1 Z YZ WX 00 01 11 10 Y X W
Given function:
F2(W,X,Y,Z) = = Σm(0,1,2,4,5,6,8, ,12,13,14)
Simplified function:
F2(W,X,Y,Z) = = Y’ + W’Z’ + XZ’
Given function:
Given function: 1 Z YZ WX 00 01 11 10 Y X W
F1(W,X,Y,Z) = = Σm(0,1,2,4,5,7,8,9,10,12,13)
F3(W,X,Y,Z) = W’X’Y’ +
X’YZ’ + WX’Y’ + W’XYZ’
Simplified function:
Simplified function:
F1(W,X,Y,Z) = = Y’ + X’Z’ + W’XZ
F3(W,X,Y,Z) = = X’Y’ + X’Z’ + W’YZ’
Digital Techniques Fall 2007 André Deutz, Leiden University

43. Grouping Cells in a K-map Systematically
The procedure for combining cells in a K-map may be made more systematic if we introduce the terms: implicants, prime implicants, and essential prime implicants.
An Implicant (I) of a function F is a product term which implies F, i.e., F = 1 whenever I = 1.
All minterms of a function F are implicants of F.
All rectangles in a K-map made up of cells containing 1s correspond to implicants.
An implicant of F is called a Prime Implicant (PI) if any product term obtained by deleting a literal of PI is NOT an implicant of F.
(Equivalently: An implicant P of F is prime, if there is no implicant I of F such that P implies I.)
Thus, a prime implicant is not contained in any “larger” implicant.
On a K-map of n-variable function, the set of prime implicants corresponds to the set of all rectangles made up of 2m cells containing 1s (m = 0, 1,2,…,n), with each rectangle containing as many cells as possible.
Digital Techniques Fall 2007 André Deutz, Leiden University

44. Example of Prime Implicants (PIs)
Consider function F(W,X,Y,Z) whose K-map is shown at right.
Product terms Z’, XY, WX’Y’ are prime implicants. Why?
Consider the term XY and obtain terms by deleting any literal:
We get two terms: term X and term Y.
Both terms are NOT implicants of F.
Thus, the term XY is prime implicant.
Y’Z’ is not a prime implicant because it is contained in Z’.
WXY is not a prime implicant because it is contained in XY. W 1 Z YZ WX 00 01 11 10 Y X
Y’Z’
WXY
WX’Y’ Z’ XY
Digital Techniques Fall 2007 André Deutz, Leiden University

45. Essential Prime Implicants (EPIs)
If a minterm of a function F is included in ONLY one prime implicant pi, then pi is an Essential Prime Implicant of F.
An essential prime implicant MUST appear in all possible SOP expressions of function F.
To find essential prime implicants:
Generate all prime implicants of a function
Select those prime implicants that contain at least one 1 that is not covered by any other prime implicant.
For the previous example, the PIs are Z’, XY, and WX’Y’; all of these are essential. Z’ XY YZ Y 00 01 11 10 WX 00 1 1 01 1 1 1 X 1 1 11 1 W 10 1 1 1 Z
WX’Y’
Digital Techniques Fall 2007 André Deutz, Leiden University

46. Essential Prime Implicants (examples)
Consider function F1(W,X,Y,Z) whose K-map is shown below:
All Prime Implicants are: XZ’, W’XY’, W’Y’Z, X’Y’Z, WX’Z, WX’Y, WYZ’
Essential Prime Implicants are: XZ’
Consider function F2(W,X,Y,Z) whose K-map is shown below:
All Prime Implicants are: XZ’, W’Z, W’X
Essential Prime Implicants are: XZ’ and W’Z 1 Z YZ WX 00 01 11 10 X W Y 1 Z YZ WX 00 01 11 10 Y X W
Digital Techniques Fall 2007 André Deutz, Leiden University

47. Systematic Procedure for Simplifying Boolean Functions
Given : The K-map of a Boolean function
Obtain: The simplest SOP expression for the function
Find all primary implicants (PIs) of the function.
Select all essential PIs.
For remaining minterms not included in the essential PIs, select a set of other PIs to cover them, with minimal overlap in the set.
The resulting simplified function is the logical OR of the product terms selected above.
Digital Techniques Fall 2007 André Deutz, Leiden University

48. Digital Techniques Fall 2007 André Deutz, Leiden University
Example
F(W,X,Y,Z) = ∑m(0,1,2,3,4,5,7,14,15).
All prime implicants (PI) are: W’X’, W’Y’, W’Z, XYZ, WXY
Select all essential PIs: W’X’, W’Y’, WXY
Select other PIs to cover all 1s with minimal overlap:
Possibilities: W’Z or XYZ
We select W’Z because it is simpler.
F(W,X,Y,Z) = W’X’+W’Y’+WXY+ W’Z 1 Z YZ WX 00 01 11 10 Y X W
Digital Techniques Fall 2007 André Deutz, Leiden University

49. Digital Techniques Fall 2007 André Deutz, Leiden University
Other Examples (cont.)
Consider function F(W,X,Y,Z) =∑m(0,1,2,4,5,10,11,13,15) whose K-map is shown at right.
All prime implicants are:
W’Y’, XY’Z, WXZ, WYZ, WX’Y, W’X’Z’, X’YZ’
Essential prime implicants are:
W’Y’
Nonessential prime implicants are:
Simplified function (solution not unique):
F = W’Y’+WXZ+WX’Y+W’X’Z’
F = W’Y’+WXZ+WX’Y+X’YZ’
F = W’Y’+WYZ+X’YZ’+XY’Z
F = W’Y’+WYZ+X’YZ’+WXZ W Z 1 YZ WX 00 01 11 10 X Y
WXZ and WX’Y are NON-overlapping PIs.
WYZ and X’YZ’ are NON-overlapping PIs.
Digital Techniques Fall 2007 André Deutz, Leiden University

50. Product-Of-Sum (POS) Simplification
So far, we have considered simplification of a Boolean function expressed in Sum-Of-Products (SOP) form using a K-map .
Sometimes the Product-Of-Sums form of a function is simpler than the SOP form.
Can we use K-maps to simplify a Boolean function in Product-Of-Sums form?
Procedure:
Use sum-of-products simplification on the zeros of function F in the K-map. In this way you will get the simplified complement of F (F’).
Find the complement of F’ which is F, i.e., (F’)’ = F
Recall that the complement of a Boolean function can be obtained by (1) taking the dual and (2) complementing each literal.
OR, using DeMorgan’s Theorem.
Digital Techniques Fall 2007 André Deutz, Leiden University

51. POS Simplification Example
The complement of F (F’)
F =∑m(0,1,2,3,4,5,7,14,15) W Z 1 YZ WX 00 01 11 10 X Y W Z YZ WX 00 01 11 10 X 1 Y
Simplify using zeros: F’ = WX’ + WY’+ W’XYZ’
Complement F’ to find F, i.e., F = (F’)’
First get the dual of F’: dual(F’) = (W+X’) • (W+Y’) • (W’+X+Y+Z’)
Complement each literal in dual(F’) to get F as POS F = (W’+X) • (W’+Y) • (W+X’+Y’+Z)

52. Don’t-Care Conditions
Sometimes a Boolean function is not specified for some variable value combinations. Why?
There may be a combination of input values which will never occur. (See for an example Assignment #5)
If they do occur, the value of the function is of no concern.
The function value for such combinations is called a don't-care and the combination is called don’t-care condition.
The don’t-care function values are usually denoted with x. Each x may be arbitrarily assigned the value 0 or 1 in an implementation.
Don’t-cares can be used to further simplify a function.
Digital Techniques Fall 2007 André Deutz, Leiden University

53. Example with Don’t-Care Conditions
Consider the following incompletely specified function F that has three don’t-care minterms d:
F(A,B,C,D) = ∑m(1,3,7,11,15)
d(A,B,C,D) = ∑m(0,2,5) A D x 1 CD AB 00 01 11 10 B C D A x 1 CD AB 00 01 11 10 B C
F1 = CD + A’B’
F2 = CD + A’D
Notice: F1 and F2 are algebraically not equal. Both include the specified minterms of F, but each includes different don’t-care minterms.
Digital Techniques Fall 2007 André Deutz, Leiden University

54. 3-Level Majority Circuit
• K-Map Reduction results in a reduced two-level circuit (that is, AND followed by OR. Inverters are not included in the two-level count). Algebraic reduction can result in multi-level circuits with even fewer logic gates and fewer inputs to the logic gates.
Digital Techniques Fall 2007 André Deutz, Leiden University

55. Truth Table with Don’t Cares
• A truth table representation of a single function with don’t cares.
Digital Techniques Fall 2007 André Deutz, Leiden University

56. Tabular (Quine-McCluskey) Reduction
• Tabular reduction begins by grouping minterms for which F is nonzero according to the number of 1’s in each minterm. Don’t cares are considered to be nonzero.
• The next step forms a consensus between each pair of adjacent groups for all terms that differ in only one variable.
Digital Techniques Fall 2007 André Deutz, Leiden University

57. Table of Choice (Selection)
• The prime implicants form a set that completely covers the function, although not necessarily minimally.
• A table of choice is used to obtain a minimal cover set.
Digital Techniques Fall 2007 André Deutz, Leiden University

58. Reduced Table of Choice
• In a reduced table of choice, the essential prime implicants and the minterms they cover are removed, producing the eligible set.
• F = ABC + ABC + BD + AD
Digital Techniques Fall 2007 André Deutz, Leiden University

59. Digital Techniques Fall 2007 André Deutz, Leiden University

60. Digital Techniques Fall 2007 André Deutz, Leiden University

61. Where are we?
We have seen several implementations of AND, OR and NOT gates
With these primitives we can build for any 1-0 table specification a CLU (combinational logic unit) satisfying it.
We already have built some higher level CLUs; the next step is to use these higher level CLUs in turn to get the next level of sophistication (hierarchical approach)
An example of the next level in the hierarchy would be an Arithmetic Logic Unit – this is exactly what we are going to build next.
Subsequently we will look at sequential circuits and memory elements.

62. Back to Constructing CLUs
Make a list of useful CLUs you made so far (hint: consider the lectures and Assignments)
Construct a one-bit Arithmetic Logic Unit (ALU) – i.e., provide its Logic Diagram; this CLU has 5 inputs and 2 outputs; the inputs: three data inputs (A and B and Carry_in); two control inputs: they determine which of the four operations are carried out on the three data inputs (logical or of A and B, logical and of A and B, the negation of A, and lastly the sum of A and B which also takes into account the carry_in; the output consists of 1) the result of the chosen operation and 2) a carry_out – relevant in case the sum is wished for.
Implement the above constructed LD in Digital works.
Construct the LD for 32-bit ALU; secondly, implement the LD in Digital Works.
Digital Techniques Fall 2007 André Deutz, Leiden University