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Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Chapter 8: Memory Management Strategies.

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Presentation on theme: "Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Chapter 8: Memory Management Strategies."— Presentation transcript:

1 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Chapter 8: Memory Management Strategies

2 7.2 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Chapter 8: Memory Management Strategies Background Swapping Contiguous Memory Allocation Paging Structure of the Page Table Segmentation

3 7.3 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Objectives To provide a detailed description of various ways of organizing memory hardware To discuss various memory-management techniques, including paging and segmentation

4 7.4 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition

5 7.5 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Background  Memory is central to the operation of a modern computer system.  Memory consists of a large array of words or bytes, each with its own address  Selection of a memory-management method for a specific system depends on many factors, especially on the hardware design of the system.

6 7.6 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Basic Hardware Main memory, registers and cash are ONLY storage CPU can access directly Program must be brought (from disk) into memory and placed within a process for it to be run Direct storage access time:  Register access in one CPU clock (or less)  Main memory can take many cycles (i.e. slowly)  Solution: Cache (fast memory) sits between main memory and CPU registers Protection of memory:  Protection of memory is necessary to ensure correct operation  Protection from what (/possible risks)???? – protect the operating system from access by user processes – protect user processes from one another.  This protection must be provided by the hardware &can be implemented in several ways. Huge problem… because of the frequency of memory accesses.

7 7.7 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Basic Hardware (Cont.) One method to implement protection: use Base and Limit Registers We need to make sure that each process has a separate memory space….How??? Main idea: we need to determine the range of legal addresses that can be accessed only by the process.  We can provide this protection by using two registers (base & limit) – The base register>> holds the physical address of the first byte in the legal range. – The limit register >> holds the size of the range.

8 7.8 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Basic Hardware (Cont.) – Example.: If the base register holds 300040 and the limit register is 120900….what is the range of legal addresses ?? » The program can legally access all addresses from 300040 through 420939 (inclusive) » NOTE: Last physical address = base +limit -1

9 7.9 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Basic Hardware (Cont.) How base & limit registers help to provide memory protection?? By applying (2) procedures: – Procedure (1): The CPU hardware compare every address generated in user mode with the registers. – Procedure (2): restrict the ability to load base & limit registers only to OS..

10 7.10 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Basic Hardware (Cont.) Procedure (1): The CPU hardware compare every address generated in user mode with the registers.  If (CPU generated address ≥ base) & (CPU generated address < base +limit) … – Then …..the CPU generated address is legal and allowed to access the memory – Else…… the CPU generated address is illegal and NOT allowed to access the memory…..(causing a trap (/error) to OS) This scheme prevents a user program from (accidentally or deliberately) modifying the code or data structures of either the operating system or other users…..(solution to protection problem)

11 7.11 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Basic Hardware (Cont.) Fig. (8.2): Hardware address protection with base and limit registers

12 7.12 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Basic Hardware (Cont.) Procedure (2): restrict the ability to load base & limit registers ONLY to OS. This restriction applied by using a special privileged instruction. Since privileged instructions can be executed only in kernel mode, and since only the operating system executes in kernel mode…..So, ONLY the operating system can load the base and limit registers. This scheme allows the operating system to change the value of the registers but prevents user programs from changing the registers’ contents.

13 7.13 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Address Binding Address binding( or relocation): The process of associating program instructions and data to physical memory addresses A user program will go through several steps -some of which may be optional-before being executed ….. ( steps are: compiling>>> linking>>>execution) Addresses may be represented in different ways during these steps. Addresses in the source program are generally symbolic (such as count, sum). A compiler will typically bind these symbolic addresses to relocatable addresses (such as "14 bytes from the beginning of this module"). The linkage editor or loader will in turn bind the relocatable addresses to absolute addresses (physical address) (such as 74014). Each binding is a mapping from one address space to another.

14 7.14 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Address Binding (cont.) Figure 8.3: Multistep processing of a user program.

15 7.15 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Address Binding (cont.) The binding of instructions and data to memory addresses can be done at any step along the way: Compile time. The compiler translates symbolic addresses to absolute addresses. If you know at compile time where the process will reside in memory, then absolute code can be generated (Static). Load time : When it is not known at compile time where the process will reside in memory, then The compiler translates symbolic addresses to relative (relocatable) addresses. The loader translates these to absolute addresses (Static). Execution time. If the process can be moved during its execution from one memory segment to another, then binding must be delayed until run time. The absolute addresses are generated by specialhardware (e.g.MMU)  Most general-purpose OSs use this method (Dynamic). Static-new locations are determined before execution. Dynamic-new locations are determined during execution.

16 7.16 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Logical vs. Physical Address Space Logical/virtual address: address generated by CPU Physical address: address seen by memory hardware Compile-time / load-time binding >>> logical address = physical address Run-time binding >>> logical address≠ physical address Logical address space: is the set of all logical addresses generated by a program Physical address space: is the set of all physical addresses corresponding to these logical addresses. MMU (Memory-Management Unit ): h/w device that maps virtual addresses to physical addresses at run time Different methods of address mapping (/memory management strategies):  Continuous memory allocation  Paging  segmentation

17 7.17 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Simple Address Mapping Method For NOW, we illustrate address mapping with a simple MMU scheme: The base register is now called a relocation register. Basic methodology>>>> Physical address= logical address + relocation register For example:  Base register contains 14000  If logical address =0 >>>> Physical address= 0+14000=14000  If logical address =346 >>>> Physical address= 346+14000=14346 The user program never sees the real physical addresses. The user program deals with logical addresses. MMU converts logical addresses into physical addresses.

18 7.18 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Example of Simple Address Mapping Method

19 7.19 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition

20 7.20 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Swapping Swapping is a mechanism in which a process can be swapped temporarily out of main memory to a backing store, and then brought back into memory for continued execution. Backing store is a usually a hard disk drive or any other secondary storage which fast in access and large.

21 7.21 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Swapping (Cont.) How swapping performed??? The system maintains a ready queue consisting of all processes whose memory images are on the backing store or in memory and are ready to run. Whenever the CPU scheduler decides to execute a process, it calls the dispatcher. The dispatcher checks to see whether the next process in the queue is in memory. If it is not, and if there is no free memory region, the dispatcher swaps out a process currently in memory and swaps in the desired process. Then, Dispatcher reloads registers and transfers control to the selected process. Major time consuming part of swapping is transfer time Total transfer time ∝ amount of memory swapped. Context-switch time in such a swapping system is high. Swapping is normally disabled but will start if many processes are running and are using a threshold amount of memory. Swapping is again halted when the load on the system is reduced.

22 7.22 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition

23 7.23 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Basic Memory Management schemes Mem. Manegment schems (/strategies) Continuous Allocation Multiple-partition method (Fixed-partition allocation) variable size method Paging Conventional paging (basic method) Hierarchical Page Hashed PageInverted Page Segmentation >>>>These strategies can also be combined.

24 7.24 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition

25 7.25 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Contiguous Memory Allocation (CMA) The memory is usually divided into two partitions: One for the resident OS One for the user processes. We can place the OS in either low memory or high memory. Basic methodology: Each process is contained in a single contiguous section of memory. CMA strategy can be applied in (2) methods: Multiple-partition method/(Fixed-partition allocation) method variable-partition allocation method

26 7.26 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Memory Allocation Method #(1): Multiple-partition method (/Fixed-partition method) Main idea: divide memory into several fixed-sized partitions. Each partition may contain exactly one process.. In this multiple-partition method:  When a partition is free, a process is selected from the input queue and is loaded into the free partition.  When the process terminates, the partition becomes available for another process. The degree of multiprogramming is bound by the number of partitions One of the simplest methods for allocating memory This method is called (Multiprogramming with a Fixed number of Tasks/ MFT) This method is no longer in use

27 7.27 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Method #(2): variable-partition method: Memory is divided into variable-sized partitions OS maintains a list of allocated / free partitions (holes) When a process arrives, it is allocated memory from a hole large enough to accommodate it Memory is allocated to processes until requirements of next process in queue cannot be met OS may skip down the queue to allocate memory to a smaller process that fits in available memory When process exits, memory is returned to the set of holes and merged with adjacent holes, if any The method is a generalization of the fixed-partition scheme (called Multiprogramming with a Variable number of Tasks (MVT)) Memory Allocation (cont.)

28 7.28 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Example: Memory Allocation (cont.)

29 7.29 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Memory Allocation (cont.) New problem appear in variable-partition method…(how to satisfy a request of size (n) from a list of free holes??? ) There are many solutions to this problem: First fit.  Allocate the first hole that is big enough.  Searching can start either at the beginning of the set of holes or where the previous first-fit search ended. We can stop searching as soon as we find a free hole that is large enough. Best fit  Allocate the smallest hole that is big enough.  We must search the entire list, unless the list is ordered by size.  This strategy produces the smallest leftover hole. Worst fit.  Allocate the largest hole.  we must search the entire list, unless it is sorted by size.  This strategy produces the largest leftover hole, which may be more useful than the smaller leftover hole from a best-fit approach.

30 7.30 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Exercise (8.16): Given five memory partitions of 100 KB, 500 KB, 200 KB, 300 KB, and 600 KB (in order), how would each of the first-fit, best-fit, and worst-fit algorithms place processes of 212 KB, 417 KB, 112 KB, and 426 KB (in order)?Which algorithm makes the most efficient use of memory? >>> Let p1, p2, p3 & p4 are the names of the processes Memory Allocation (cont.) Best-fit: P1>>> 100, 500, 200, 300, 600 P2>>> 100, 500, 200, 88, 600 P3>>> 100, 83, 200, 88, 600 P4>>> 100, 83, 88, 88, 600 100, 83, 88, 88, 174 final set of holes First-fit: P1>>> 100, 500, 200, 300, 600 P2>>> 100, 288, 200, 300, 600 P3>>> 100, 288, 200, 300, 183 100, 176, 200, 300, 183 P4 (426K) must wait Worst-fit: P1>>> 100, 500, 200, 300, 600 P2>>> 100, 500, 200, 300, 388 P3>>> 100, 83, 200, 300, 388 100, 83, 200, 300, 276 << final set of hole P4 (426K) must wait >>> In this example, Best-fit turns out to be the best because there is no wait processes.

31 7.31 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Fragmentation is a problem appears in memory allocation censers about unusable memory space. Fragmentation types: External fragmentation: memory space to satisfy a request is available, but is not contiguous…(i.e. storage is fragmented into a large number of small holes)  Both the first-fit and best-fit strategies for memory allocation suffer from external fragmentation.  (1/3) of memory may be unusable!!! Internal Fragmentation: allocated memory may be larger than requested memory….(i.e. some memory within partition may be left unused)  may be used to avoid overhead required to keep track of small holes Fragmentation (Cont.)

32 7.32 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Fragmentation (Cont.) External fragmentation solution: Compaction: Memory contents shuffled to place all free memory together in one large block  Dynamic relocation (run-time binding) needed  Compaction is expensive (high overhead) Permit the logical address space of the processes to be non- contiguous, thus allowing a process to be allocated physical memory wherever it is available.  Two techniques achieve this solution: – Paging – Segmentation

33 7.33 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition

34 7.34 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition

35 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition End of Chapter 7

36 7.36 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Helpful Information The computer system has two modes of operation : User mode Kernel mode (also called supervisor mode/ system mode/ privileged mode). There is a bit (mode bit) indicate the current mode: kernel (0) or user (1). When the computer system is executing on behalf of a user application, the system is in user mode. Whenever the operating system gains control of the computer, it is in kernel mode. Only the operating system executes in kernel mode Privileged instructions: are a machine code instructions that may only be executed when the processor is running in kernel mode. Example of privileged instructions: I/O operations and interrupt management. If an attempt is made to execute a privileged instruction in user mode>>> the hardware does not execute the instruction & traps it to the operating system.


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