1. Memory Management

2. Process must be loaded into memory before being executed. Memory needs to be allocated to ensure a reasonable supply of ready processes to consume available processor time

3. Memory Management Requirements Memory Management Techniques determine: How the memory is to be (logically) subdivided? Where and how a process resides in memory? How addressing is performed? How process can be relocated? How memory is to be protected? How memory can be shared by processes? How to logical and physically organize memory Requirements Minimize executable memory access time Maximize executable memory size Executable memory must be cost-effective

4. Memory Requirements of a Process

5. Mono-programming

6. Multi-Programming

7. Creating an Executable Program

8. Addresses The symbolic addresses are the addresses used in a source program. The variable names, symbolic constants and instruction labels are the basic elements of the symbolic address space. The compiler converts a symbolic addresses into a relative/fixed address. The physical address consists of the final address generated when the program is loaded and ready to execute in physical memory; the loader generates these addresses.

9. Binding of Instructions and Data to Memory Address binding of instructions and data to memory addresses can happen at three different stages. Compile time: If memory location known a priori, absolute code can be generated; must recompile code if starting location changes. Load time: The compiler must generate relocatable code if memory location is not known at compile time. The final binding is delayed until load time. Execution time: Binding delayed until run time if the process can be moved during its execution from one memory segment to another. Need hardware support for address maps (e.g., base and limit registers).

11. Logical vs. Physical Address Space The concept of a logical address space that is bound to a separate physical address space is central to proper memory management. Logical address – generated by the CPU; also referred to as virtual address. Physical address – address seen by the memory unit. Logical and physical addresses are the same in compile-time and load-time address-binding schemes; logical (virtual) and physical addresses differ in execution-time address-binding scheme.

12. Memory Management Unit - (MMU) MMU is a hardware device that maps virtual to physical address at run-time. The user program deals with logical addresses; it never sees the real physical addresses.

13. Memory Management Techniques

14. Single-Partition Allocation A single processes in loaded into the memory at a time. Commercially available in 1940s and 1950s Entire program loaded into memory

15. Single-Partition Allocation Advantages: Simplicity No special hardware required Disadvantages: CPU wasted Main memory not fully used Limited job size No support for multiprogramming

16. Multiple-Partition Allocation – Fixed Partitions

18. Disadvantages Requires contiguous loading of entire program Job allocation method First available partition with required size To work well: All jobs must be same size and memory size known ahead of time Arbitrary partition size leads to undesired results Partition too small - Large jobs have longer turnaround time Partition too large - Memory waste

19. Multiple-Partition Allocation – Dynamic Partitions

20. Merging of holes

21. Pros and Cons of Dynamic Allocation Advantages Efficient use of memory Disadvantages Partition management Compaction or external fragmentation Internal fragmentation

22. Dynamic Allocation Placement Algorithms First-fit: Allocate the first hole that is big enough. The search can start either at the beginning of the set of holes or where the previous first-fit search was ended. If entire list searched in vain Then job is placed into waiting queue Else Memory Manager fetches next job

23. Dynamic Allocation Placement Algorithms Best-fit: Allocate the smallest hole that is big enough; must search entire list, unless ordered by size. Produces the smallest leftover hole. Entire table searched before allocation Worst-fit: Allocate the largest hole; must also search entire list. Produces the largest leftover hole. First-fit and best-fit better than worst-fit in terms of speed and storage utilization.

24. Fragmentation External Fragmentation – total memory space exists to satisfy a request, but it is not contiguous. Internal Fragmentation – allocated memory may be slightly larger than requested memory; this size difference is memory internal to a partition, but not being used.

26. Solutions to External Fragmentation Compaction Contiguous Allocation – Paging, Segmentation

27. Compaction

28. Paging

29. Memory Allocation in Paging

30. Address Translation

32. Translating Logical Address into Physical Address

33. Implementation of Page Table Page table for each process is kept in main memory. Page-table base register (PTBR) points to the page table. Page-table length register (PTLR) indicates size of the page table. In this scheme every data/instruction access requires two memory accesses. One for the page table and one for the data/instruction. The two memory access problem can be solved by the use of a special fast-lookup hardware cache called associative memory or translation look-aside buffers (TLBs).

34. Associative Memory

35. Pros and Cons of Paging Advantages: Efficient memory use Simple partition management due to discontinuous loading and fixed partition size No compaction is necessary Easy to share pages Disadvantages Job size <= memory size Internal fragmentation Need special hardware for address translation Some main memory is used for page table Address translation lengthens memory cycle times

36. Segmentation

37. Memory Allocation in Segmentation

38. Address Mapping in Segmentation The user specifies each address by two quantities: segment name/number and offset. Mapping from logical address to physical address is done with the help of a segment table. Segment table – maps two-dimensional physical addresses; each table entry has: base – contains the starting physical address where the segments reside in memory. limit – specifies the length of the segment.

39. Address Mapping in Segmentation

40. Segmentation with Paging

41. Comparison of Paging and Segmentation