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Capturing Crosstalk-Induced Waveform for Accurate Static Timing Analysis Masanori Hashimoto, Yuji Yamada, Hidetoshi Onodera Kyoto University.

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Presentation on theme: "Capturing Crosstalk-Induced Waveform for Accurate Static Timing Analysis Masanori Hashimoto, Yuji Yamada, Hidetoshi Onodera Kyoto University."— Presentation transcript:

1 Capturing Crosstalk-Induced Waveform for Accurate Static Timing Analysis Masanori Hashimoto, Yuji Yamada, Hidetoshi Onodera Kyoto University

2 How cope with crosstalk- induced waveform? Never provide accurate waveforms

3 Problems of Conventional Methods  Conventionally crossing-point approach  Calculate crossing timing of reference voltage e.g. 50% delay, 20-70% transition time, etc. Estimate large delay difference in error almost the same waveforms

4 Gate Waveform Calculation  Table look-up model  Huge characterization cost  Difficult to increase #parameter of waveform Characterization has to assume a typical waveform.

5 Related Works  Sasaki, ASIC/SoC Conf., 1999  Estimate delay change vs transition timing at receiver output by circuit simulation  Simulation is necessary for every instance  Sirichotiyakul, DAC, 2001  Estimate delay change at receiver output by look-up tables  Library extension and characterization increase

6 Proposed Equivalent Waveform Approach  Propose equivalent waveform propagation that makes output waveforms equal  Adjust both arrival time and slew Characterization uses typical waveforms.

7 Derivation of Equivalent Waveform  Fitting waveforms using least square method  Approximate entire outline Work well? NO!!

8 Problem of LSM  Uniform fitting weight even for unnecessary region misleads equivalent waveform. Adaptive fitting for critical region is necessary. Transition finishes before noise injection.

9 Proposed Method  Improved LSM with weight coefficient  To consider output behavior slope Noiseless waveforms Vout vs Vin curve High gain sensitive to input Critical Region Higher weight

10 Strength of Proposed Method  No library extension  No additional characterization  No additional calculation except fitting  Implemented easily with conventional STA tools

11 Experimental Conditions  True delay change is evaluated at Gate3 output.  Conventional Method: delay change is evaluated at Gate2 input  100nm process, semi-global wire, 1mm coupled

12 Experimental Result ( Crosstalk )  Agg., vic. drivers 4x, 4x, load(C1,C2)=100fF Accurate delay variation curve is obtained.

13 Equivalent and Actual Waveforms Proposed method is not misled by meaningless noise. Cross 0.5Vdd Conventional method shifts waveform in error.

14 Agg.=vic. =4x, C1=C2=10fF Agg.=vic. =8x, C1=C2=100fFAgg.=vic. =8x, C1=C2=10fF Proposed method estimates more accurate curves than conventional methods. Worst case in our experiments.

15 Experimental Result (Crosstalk, two aggressors) Proposed method works even when multiple aggressors.

16 Computational Cost  Numerical integration is necessary.  #segments: accuracy vs CPU time  CPU time increase is evaluated.  Path delay calculation of inverter chain  File I/O and RC reduction are excluded.  3-20 #segments is accurate enough. #segments5102040 CPU time1.171.271.481.71 conventional method: 1.00

17 Conclusion  Propose equivalent waveform propagation scheme  Cope with non-monotonic waveforms  Familiar with conventional STA tools  Experimentally verify our method improves much accuracy just with 30% CPU time increase.


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