1. Logic Design CS221 1 st Term 2009-2010 combinational circuits Cairo University Faculty of Computers and Information

2. 24/10/2009 cs221 – sherif khattab 2 Administrivia project discussion lab of this week: simple game office hours:  tuesdays: 4:30-7  wednesdays: 12-4

3. 24/10/2009 cs221 – sherif khattab 3 our story so far... digital circuit specification  inputs and outputs  truth table of each output  (or Boolean-algebraic representation)‏  don't -care conditions (if any)‏ truth table -> K-map K-map -> simplified algebraic expression algebraic expression -> gate implementation  AND-OR, OR-AND, NAND, NOR, XOR, etc. combinational circuits (today's lecture)‏  no memory

4. 24/10/2009 cs221 – sherif khattab 4 step 4: verification For small circuits:  assign variable names to intermediate signals  derive truth table For large circuits  computer software

5. 24/10/2009 cs221 – sherif khattab 5 step 4: verification

6. 24/10/2009 cs221 – sherif khattab 6 example 2: binary adder Design a circuit that adds two n-bit binary numbers 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 10 carry Add two 5-bit numbers: 0 1 0 0 1 + 1 1 0 1 0 -------------- 110 0 1 0 1 1

7. 24/10/2009 cs221 – sherif khattab 7 example 2: binary add/subtract we can follow the same steps as before: step 1: specification  2n inputs  n+1 outputs  truth table step 2: simplification step 3: implementation

8. 24/10/2009 cs221 – sherif khattab 8 example 2: binary add/subtract we will take another approach  bottom-up approach  building circuit in blocks

9. 24/10/2009 cs221 – sherif khattab 9 smallest block: half-adder circuit that adds two bits (half-adder)‏ 2 inputs (x and y) and 2 outputs (Sum and Carry)‏

10. 24/10/2009 cs221 – sherif khattab 10 half-adder step 1: specification step 2: simplification  S = x'y + xy'  C = xy step 3: implementation

11. 24/10/2009 cs221 – sherif khattab 11 full-adder: one step up 3 inputs (two bits and carry)‏ 2 outputs: sum and carry

12. 24/10/2009 cs221 – sherif khattab 12 full-adder: one step up 3 inputs (two bits and carry)‏ 2 outputs: sum and carry implementation using half-adders x y z y S0S0 C0C0 half-adder 1 half-adder 0 S1S1 C1C1 S C

13. 24/10/2009 cs221 – sherif khattab 13 1 -- 0 1 0 -- 0

14. 24/10/2009 cs221 – sherif khattab 14 4-bit binary adder: one step up adds two 4-bit binary numbers (add an input carry)‏ K-map design: 9 inputs... too much

15. 24/10/2009 cs221 – sherif khattab 15 4-bit binary adder: one step up adds two 4-bit binary numbers (add an input carry)‏ using four full adders

16. 24/10/2009 cs221 – sherif khattab 16 example: binary subtractor subtracts two n-bit binary numbers how many inputs? outputs? 7 0111 0111 - 5 - 0101 +1010 ------ --------- + 1 --------- 10010 2's complement of 0101 7 0111 0111 - 9 -1001 + 0110 ------ --------- + 1 --------- 01110 2's complement of 1001

17. 24/10/2009 cs221 – sherif khattab 17 example: binary subtractor A – B = A + (1's complement of B) + 1 1

18. 24/10/2009 cs221 – sherif khattab 18 overflow if the sum of two n-bit numbers occupies n+1 bits, an overflow has occurred computers must detect overflow...why? we will add a circuit to detect overflow overflow detection depends on whether the two added numbers are signed or unsigned

19. 24/10/2009 cs221 – sherif khattab 19 overflow detection unsigned: end carry => overflow signed: last bit is the sign if the last two carries are equal => no overflow if the last two carries are not equal => overflow

20. 24/10/2009 cs221 – sherif khattab 20 overflow detection C3 XOR C4 = 1 when? C3 XOR C4 = 0 when? V (overflow detection) = C3 XOR C4