1. Chapter 9: Memory Management Memory management is an OS activity which controls distribution of memory among processes. The part of the OS that manages memory is called the memory manager. The main jobs are: To keep track of used and free memory To allocate and de-allocate memory for processes To manage swapping between main memory and disk.

2. Background Memory management systems rely on the following strategies: Memory allocation (partitioning) Swapping Paging Segmentation Virtual memory

3. Memory allocation Monoprogramming: The simplest possible memory management scheme is to have just one process in memory at a time and to allow that process to use all memory. This approach is not used any more even in home computers. This approach can be as:  Device Drivers are loaded in ROM,  the rest of the OS is loaded in part of the RAM and  the user program uses the entire remaining RAM. On computers with multiple users, monoprogramming is not used, because different users should be able to run processes simultaneously. This requires having more than one process in memory (i.e. multiprogramming), thus another approach for memory management is multiprogramming.

4. Memory allocation Multiprogramming – with fixed partitioning: With this strategy, the memory is divided into N (typically unequal) portions called “partitions”. When a job arrives, it can be inserted into the smallest partition large enough to hold it. Basically, we might have a single job queue served by all the partitions or one input queue for each partition. multiple queues single queue

5. Memory allocation Two special registers called Base and Limit are usually used per partition for protection. Fixed partitioning method has two main problems:  How to determine the number of partitions and size of each partition?  Fragmentation (both internal and external) may occur!

6. Memory allocation Multiprogramming – with variable partitioning: In this method, we keep a table indicating used/free areas in memory. Initially, whole memory is free and it is considered as one large block. When a new process arrives, we search for a block of free memory, large enough for that process. The number, location and size of the partitions vary dynamically as process come and go.

7. Variable partitioning - example A is moved into main memory, then process B, then process C, then A terminates or is swapped out, then D comes in, then B goes out, then E comes in. If a block is freed, we try to merge it with its neighbors if they are also free.

8. Selection of blocks First-Fit: Allocate the first free block that is large enough for the new process (very fast). Best-Fit: Allocate the smallest block among those that are large enough fort he new process. We have to search the entire list. However, this algorithm produces the smallest left- over block. Worst-Fit: Allocate the largest block among those that are large enough fort he new process. Again, we have to search the list. This algorithm produces the largest left-over block. There are three main algorithms for searching the list of free blocks for a specific amount of memory:

9. Example Consider the example given on the right. Now, assume that P4 = 3K arrives. The block that is going to be selected depends on the algorithm used.

10. Example before insertion

11. Relative performance Simulation studies show that Worst-fit is the worst and in some cases, First-fit has better performance than Best-fit. Generally, variable partitioning results in better memory utilization than fixed partitioning; causes lesser fragmentation; and serves large or small all partitions equally well.

12. Fragmentation The algorithms described above suffer from external fragmentation. As processes as loaded and removed from memory, it is broken into small regions. External fragmentation occurs when enough memory space exists but it is not contiguous. P3 P2 P1 OS 1000 800 600 250 100 Assume that a new process P4 arrives requiring 250 bytes. Although there are 350 bytes free space, this request cannot be satisfied. This is called external fragmentation of memory

13. Fragmentation Assume that a new process arrives requiring 18,598 bytes. If the requested block is allocated exactly, there will be a hole of 2 bytes. The memory space required to keep this hole in the table used for indicating the available and used regions of memory will be larger than the hole itself. The general approach is to allocate very small holes as a part of larger request. The difference between the allocated and requested memory space is called internal fragmentation. P3 OS a hole of 18,600 bytes

14. Compaction One possible solution to external fragmentation problem is compaction. The main aim is to shuffle the memory contents to place all free memory together in one block. P3 P2 P1 OS 1000 800 600 250 100 P3 P2 P1 OS 1000 450 100 50 650

15. Swapping In a time sharing system, there are more users than there is memory to hold all their processes. → Some excess processes which are blocked must be kept on backing store. Moving processes between main memory and backing store is called swapping. A process can be swapped temporarily out of memory to a backing store, and then brought back into memory for continued execution. Backing store – fast disk large enough to accommodate copies of all memory images for all users; The main problem with swapping and variable partitions is to keep track of memory usage. Some techniques to address this issue are:  Bit Maps  Linked lists  Buddy system.

16. Schematic View of Swapping

17. Bit Maps Technique With a bit map, memory is divided up into allocation units (16-512 bytes). Corresponding to each allocation unit is a bit in the bit map, which is 0 if the unit is free and 1 if it is occupied The main problem with bit maps is searching for consecutive 0 bits in the map for a process. Such a search takes a long time.

18. Linked lists Technique The idea is to maintain a linked list of allocated and free memory segments, where a segment is either a process or a hole between two processes. Each entry in the list specifies a hole (H) or process (P), the address at which it starts, the length and a pointer to the next entry. The main advantage of this is that the list can be easily modified when a process is swapped out or terminates.

19. Example Consider the previous system, and assume process C is swapped out. H

20. A new process is added To allocate memory for a newly created or swapped in process, First-fit or Best-fit algorithms can be used:

21. A new process is added

22. Buddy system technique With this technique, the memory manager maintains a list of free blocks of size as power of two (i.e. 1, 2, 4, 8, 16, 32, 64, …, maxsize). For allocation, the smallest power of 2 size block that is able to hold the process is determined. If no block with such a size is available then the immediately bigger free block is split into 2 blocks (called buddy blocks), …. This buddy system is very fast, but it has the problem of fragmentation.

23. Example - initially one hole of 1024 KB

24. Paging Paging permits a program to be allocated noncontiguous blocks of memory. Divide physical memory into fixed-sized blocks called frames (size is power of 2, between 512 words and 4096 words). Divide logical memory and programs into blocks of same size (denoted by S) called pages. Keep track of all free frames. To run a program of size n pages, need to find n free frames and load program. Set up a page table to translate logical to physical addresses.

25. Logical Address Concept Remember that the location of instructions and data of a program are not fixed. The locations may change due to swapping, compaction, etc. To solve this process, a logical address is introduced. A logical address is a reference to a memory location independent of the current assignment of data in memory. A physical address is an actual location in memory.

26. Address Translation Scheme Logical Address generated by CPU is divided into:  Page number (p) – used as an index into a page table which contains base address of each page in physical memory.  Page offset (d) – combined with base address to define the physical memory address that is sent to the memory unit. p = [logical address div S], and d = [logical address % S] (i.e. d is the position of a word inside the page).

27. Address Translation Architecture When a new process formed of n pages arrives, it requires n frames in the memory. We check the free frame list. If there are more than or equal to n free frames, we allocate n of them to this new process and put it into memory. We also prepare its page table, since each process has its own PT. However, if there are less than n free frames, the new process must wait.

28. Paging Example Let S (page size) = 8 words ( 2 3 → d is represented by 3 bits) Let physical memory size = 128 words. → no. of frames = memory size / page size = 128 / 8 = 16 ) frame size = page size; 8 →3 bits, 16→4 bits.

29. Paging Example: A 3-page program

30. Implementation of Page Table Every access to memory should go through the page table. Therefore, it must be implemented in an efficient way. Use fast dedicated registers Load/store fast dedicated registers as you load/store other registers. Only the OS should be able to modify these registers. If the page table is large, this method becomes very inefficient. (e.g. IBM 370 can support 4096 pages).

31. Implementation of Page Table Keep the page table in main memory Here a page table base register (PTBR) is needed to point to the first entry of the page table in memory. This is a time consuming method, because for every logical memory reference, two memory accesses are required.  Use PTBR to find page table, and accessing the appropriate entry of the page table, find the frame number corresponding to the page number in the logical address,  Access the memory word in that frame.

32. Implementation of Page Table Use associative registers (cache memory) These are small, high speed registers built in a special way so that they permit an associative search over their contents (i.e. all registers may be searched in one machine cycle simultaneously.) Associative registers are quite expensive. So, we use a small number of them. When a logical memory reference is made:  Search for the corresponding page number in associative registers.  If that page number is found in one associative register:  Get the corresponding frame number,  Access the memory word.  If that page number is not in any associative register:  Access the page table to find the frame number,  Access the memory word → (Two memory access).  Also add that page number – frame number pair to an associative register, so that they will be found quickly on the next reference.

33. Hit Ratio EXAMPLE: Assume we have a paging system which uses associative registers with a hit ratio of 90%. Assume associative registers have an access time of 30 nanoseconds, and the memory access time is 470 nanoseconds. Find the effective memory access time (emat) Case 1: The referenced page number is in associative registers: → Effective access time = 30 + 470 = 500 ns. Case 2: The page number is not found in associative registers: → Effective access time = 30 + 470 + 470 = 970 ns. The hit ratio is defined as the percentage of times that a page number is found in the associative registers. With only 8 to 16 associative registers, a hit ratio higher than 80% can be achieved.

34. Hit Ratio Then the effective memory access time can be calculated as follows: emat = 0.90 * 500 + 0.10 * 970 = 450 + 97=547ns. So, on the average, there is a 547-470=77 ns slowdown

35. Segmentation systems In segmentation, programs are divided into variable size segments. Every logical address is formed of a segment number and an offset within that segment. Programs are segmented automatically by the compiler or assembler.

36. Segmentation systems Memory-management scheme that supports user view of memory. A program is a collection of segments. A segment is a logical unit such as: main program, procedure, function, method, object, local variables, global variables, common block, stack, symbol table, arrays

37. User’s View of a Program

38. Segmentation Architecture Logical address consists of a two tuple:, Segment table – maps two-dimensional physical addresses; each table entry has:  base – contains the starting physical address where the segments reside in memory.  limit – specifies the length of the segment. For logical to physical address mapping, a segment table (ST) is used. When a logical address is generated by the processor:  Check if ( 0 ≤ d < limit ) in ST.  If o.k., then the physical address is calculated as Base + d, and the physical memory is accessed at memory word ( Base + d ).

39. Segmentation Hardware

40. Example of Segmentation

41. For example, assume the logical address generated is Check ST entry for segment #1. The limit for segment #1 is 400. Since 123<400,we carry on. The physical address is calculated as: 9300 + 123 = 9423, and the memory word 9423 is accessed.

42. Sharing of Segments

43. Virtual memory All the memory management policies we have discussed so far try to keep a number of processes in memory simultaneously to allow multiprogramming, but they require the entire process to be loaded in memory before it can execute. With the virtual memory technique, we can execute a process which is only partially loaded in memory. Thus, the logical address space may be larger than physical memory, and we can have more processes executing in memory at a time, hence a greater degree of multiprogramming. In Virtual Memory Paging and Virtual Memory Segmentation, all pages of a process need NOT be in the main memory. Pages are read from disk as needed.

44. Fetch Policy The fetch policy determines when a page should be brought into main memory. In demand paging approach, programs reside on a swapping device (i.e. a disk). When the OS decides to start a new process, it swaps only a small part of this new process (a few pages) into memory. The PT of this new process is prepared and loaded into memory. If the process currently executing tries to access a page which is not in memory, a page fault occurs, and the OS must bring that page into memory. In prepaging approach, the operating system tries to predict the pages a process will need and preload them when memory space is available.

45. Performance Evaluation If there is no page fault: → Effective access time (e.a.t.) = effective memory access time (emat). Let p be the probability of a page fault (0 ≤ p ≤ 1). Then, the effective access time must be calculated as follows: e.a.t. = p * “page fault service time” + ( 1 – p ) * emat For example, if emat for a system is given as 1 microseconds, and the average page fault service time is given as 10 milliseconds then, e.a.t = p * ( 10 msec) + ( 1 – p ) * 1 μsec = 1 + 9999 * p μsec. If p is given as 0.001, then e.a.t. = 11 μsec.

46. Page Replacement When a page fault occurs, the OS finds the desired page on the disk, but if there are no free frames, OS must choose a page in memory (which is not the one being used) as a victim, and must swap it out to the disk. It then swaps the desired page into the newly freed frame. The PT is modified accordingly. Therefore, in servicing a page fault, the OS performs two page transfers:  Swap the victim page out,  Swap the desired page in. The answers to the following two crucial questions for demand paging systems are important:  How shall we select the victim page when page replacement is required?  How many frames should we allocate to each process?

47. Page Replacement Algorithms A page replacement algorithm determines how the victim page(s) is selected when a page fault occurs. The aim is to minimize the page fault rate. The efficiency of a page replacement algorithm is evaluated by running it on a particular string of memory references and computing the number of page faults.

48. Page Replacement Algorithms Consecutive references to the same page may be reduced to a single reference, because they won’t cause any page fault except possibly the first one.  Ex: (1,4,1,6,1,1,1,3) → (1,4,1,6,1,3). We have to know the number of frames available in order to be able to decide on the page replacement scheme of a particular reference string. Normally, one would expect that as number of frames increases, the number of page faults decreases.

49. Example With the above reference string (1,4,1,6,1,3), if we had 4 frames, it would cause only 4 page faults: one fault for the first reference to each page. If we had only a single frame, then the above string would cause 6 page faults, one for every new page reference. √ √

50. Optimal Page Replacement Algorithm With this algorithm, we replace the page that will not be used fort the longest period of time. OPT has the lowest page fault rate for a fixed number of frames among all the page replacement algorithms. OPT is not implementable in practice, because it requires future knowledge. It is mainly used for performance comparison. Example: Consider the following reference string: 5,7,6,0,7,1,7,2,0,1,7,1,0. Assume there are 3 page frames: This string causes 7 page faults by OPT √ √ √√ √ √

51. First-in First-out algorithm This is a simple algorithm, and easy to implement: choose the oldest page as the victim.. Example: Consider the following reference string: 5,7,6,0,7,1,7,2,0,1,7,1,0. Assume there are 3 page frames: This string causes 10 page faults by FIFO √ √ √ √

52. Belady’s Anomaly Normally as the number of page frames increase, the number of page faults should decrease. However, for FIFO there are cases where this generalization will fail! This is called Belady’s Anomaly. Notice that OPT never suffers from Belady’s anomaly Example: Consider the reference string: 1,2,3,4,1,2,5,1,2,3,4,5. This string causes 9 page faults by FIFO with 3 frames This string causes 10 page faults by FIFO with 4 frames √ √ √ √ √ 4

53. Least Recently Used (LRU) The idea in LRU is to use recent past as an approximation of the near future. LRU replaces that page which has not been used for the longest period of time. So, the operating system has to associate with each page the time it was last used. Example: Assume that there are 3 page frames, and consider 5,7,6,0,7,1,7,2,0,1,7,1,0.. This string causes 9 page faults by LRU √ √ √ √