Huangsheng Xu Sr. Staff Engineer, Consumer & Industry BU

ID623C: Understanding Sensorless Vector Control with Floating Point Unit (FPU) Implementation
Huangsheng Xu Sr. Staff Engineer, Consumer & Industry BU 14 October 2010 Version: 1.0 © 2010 Renesas Electronics America Inc. All rights reserved.

Huangsheng Xu Senior Staff Application Engineer,
Primary focus on Motor Control Applications and Customer Supports Ph.D. degree in electrical engineering from Texas A&M University, College Station, Texas, in 2001. Twenty years working on motor drives, especially, sensorless vector control of PMSM motors and induction motors. Three U.S. patents Over twenty papers in the IEEE journals and conference proceedings. The third award at IEEE-Industrial Application Society 2006 for sensorless vector control of three-phase induction motors . © 2010 Renesas Electronics America Inc. All rights reserved.

Renesas Technology and Solution Portfolio
Microcontrollers & Microprocessors #1 Market share worldwide * Solutions for Innovation Analog and Power Devices #1 Market share in low-voltage MOSFET** ASIC, ASSP & Memory Advanced and proven technologies In the session 110C, Renesas Next Generation Microcontroller and Microprocessor Technology Roadmap, Ritesh Tyagi introduces this high level image of where the Renesas Products fit. The big picture. * MCU: 31% revenue basis from Gartner "Semiconductor Applications Worldwide Annual Market Share: Database" 25 March 2010 ** Power MOSFET: 17.1% on unit basis from Marketing Eye 2009 (17.1% on unit basis). © 2010 Renesas Electronics America Inc. All rights reserved.

Renesas Technology and Solution Portfolio
Microcontrollers & Microprocessors #1 Market share worldwide * Solutions for Innovation ASIC, ASSP & Memory Advanced and proven technologies Analog and Power Devices #1 Market share in low-voltage MOSFET** This is where our session, 623C Sensorless Vector Control is focused within the ‘Big picture of Renesas Products’, Microcontroller and Microprocessors. * MCU: 31% revenue basis from Gartner "Semiconductor Applications Worldwide Annual Market Share: Database" 25 March 2010 ** Power MOSFET: 17.1% on unit basis from Marketing Eye 2009 (17.1% on unit basis). 4 © 2010 Renesas Electronics America Inc. All rights reserved.

Microcontroller and Microprocessor Line-up
Up to 1200 DMIPS, 45, 65 & 90nm process Video and audio processing on Linux Server, Industrial & Automotive Superscalar, MMU, Multimedia Up to 500 DMIPS, 150 & 90nm process 600uA/MHz, 1.5 uA standby Medical, Automotive & Industrial High Performance CPU, Low Power Up to 165 DMIPS, 90nm process 500uA/MHz, 2.5 uA standby Ethernet, CAN, USB, Motor Control, TFT Display High Performance CPU, FPU, DSC Legacy Cores Next-generation migration to RX H8S H8SX M16C R32C Here are the MCU and MPU Product Lines, I am not going to cover any specific information on these families, but rather I want to show you where this session is focused General Purpose Ultra Low Power Embedded Security Up to 10 DMIPS, 130nm process 350 uA/MHz, 1uA standby Capacitive touch Up to 25 DMIPS, 150nm process 190 uA/MHz, 0.3uA standby Application-specific integration Up to 25 DMIPS, 180, 90nm process 1mA/MHz, 100uA standby Crypto engine, Hardware security 5 © 2010 Renesas Electronics America Inc. All rights reserved.

Microcontroller and Microprocessor Line-up
Up to 1200 DMIPS, 45, 65 & 90nm process Video and audio processing on Linux Server, Industrial & Automotive Superscalar, MMU, Multimedia Up to 500 DMIPS, 150 & 90nm process 600uA/MHz, 1.5 uA standby Medical, Automotive & Industrial High Performance CPU, Low Power Up to 165 DMIPS, 90nm process 500uA/MHz, 2.5 uA standby Ethernet, CAN, USB, Motor Control, TFT Display High Performance CPU, FPU, DSC Legacy Cores Next-generation migration to RX H8S H8SX M16C R32C RX These are the products where this presentation applies Ethernet, CAN, USB, UART, SPI, IIC General Purpose Ultra Low Power Embedded Security Up to 10 DMIPS, 130nm process 350 uA/MHz, 1uA standby Capacitive touch Up to 25 DMIPS, 150nm process 190 uA/MHz, 0.3uA standby Application-specific integration Up to 25 DMIPS, 180, 90nm process 1mA/MHz, 100uA standby Crypto engine, Hardware security 6 © 2010 Renesas Electronics America Inc. All rights reserved.

RX FPU Sensorless Vector Control Innovation
High efficiency Low cost Home Appliances Green Power FPU Sensorless Vector Control High performance High Accuracy Industrial Automation Automotive, Health Medicals © 2010 Renesas Electronics America Inc. All rights reserved.

Agenda Introduction Taking Advantage of an FPU
RX Features for Sensorless Vector Control RX Implementation Software implementation Testing and Performance Comparison Conclusions Q&A © 2010 Renesas Electronics America Inc. All rights reserved.

Key Takeaways By the end of this session you will be able to:
Identify Renesas RX features, specifically, FPU Understand sensorless vector control of PMSM motor and FPU sensorless vector control implementation Identify strengths of Renesas FPU for Sensorless Vector Control performance enhancement © 2010 Renesas Electronics America Inc. All rights reserved.

Floating Point Unit (FPU)
The FPU brings higher performance and simpler software development to embedded applications such as motor control. © 2010 Renesas Electronics America Inc. All rights reserved.

FPU Sensorless Vector Control (SVC)
FPU enables more computationally advanced algorithms that can help improve efficiency and save energy while extending system capabilities. © 2010 Renesas Electronics America Inc. All rights reserved.

FPU Benefits Widening numeric range Performance boost
No scaling and saturation Ease of use Performance boost Improve calculation accuracy Increase the code execution speed Reduce the CPU bandwidth usage Reduce the code size C-code compiler friendly Compatible with the C/Matlab simulation code © 2010 Renesas Electronics America Inc. All rights reserved.

Introduction: Sensorless Vector Control (SVC)
© 2010 Renesas Electronics America Inc. All rights reserved.

Sensorless Control Fundamentals ----What is sensorless?
Motor PI Controller i ω* PI Controller PWM Generation i* ω i θ Speed /position sensor Speed Calculation Position Estimation Remove speed sensor Speed and rotor position are observed from motor terminal currents ω* = commanded speed, ω = measured speed © 2010 Renesas Electronics America Inc. All rights reserved.

Sensorless Control Fundamentals ----Why use sensorless?
Increase Reliability Reduced Components and wiring Harsh Environment, like air-conditioning compressors Physical space limits – axial length Reduced System Cost $3 to $50 for encoder © 2010 Renesas Electronics America Inc. All rights reserved.

Vector Control Fundamentals
Three-phase motor u i w v 120 DC motor α β a b c d q Frame Transformation What is vector control? It is one of motor control methods for three-phase AC motor, just like six step, scalar control. It is also called Field orientation Control. The goal of vector control is to equivalently transfer three-phase AC motor into DC motor, and then control AC motor like DC motor to directly control motor flux and torque. The vector control idea comes from DC motor control. As you know, DC motor has filed winding and armature winding. The field winding just produces the flux and armature winding is just used for the torque. It can directly control the flux and torque by just controlling field winding and armature winding currents. But the DC motor runs on DC power, and has commutator and brush to increase motor size and power loss. And then AC motor is developed. Both of them can produce the torque and make the rotor moving. So, there should be a relationship between AC motor and DC motor. And AC motor should be able to be controlled like DC motor. However, AC motor is input three phase AC currents, we do not know which one control flux and which one controls torque. We should transfer them into two DC currents. How to do this? The mathematical frame transformation can make it. Through frame transformation, three-phase AC motor can be transferred into DC motor and then directly control the flux and torque like DC motor to get high dynamics and steady state performance. Through frame transformation, three-phase AC motor can be transferred into DC motor and then directly control the flux and torque like DC motor to get high dynamics and steady state performance. Using frame transformation, vector control transforms AC motor into DC motor control Provide direct control of motor flux and torque Deliver optimal dynamic and steady state performance © 2010 Renesas Electronics America Inc. All rights reserved.

Frame Transformations
u i w v F Clarke Transformation a i b F w d I q F - axis Park Transformation w Clarke Transformation 3-Phase balanced stationary  2-phase balanced stationary Park Transformation 2-phase stationary  2-phase rotating Let us see how to transfer three-phase currents into two phase DC currents. The first transformation is known as the Clark transformation. It converts the three balanced currents in the three-phase stator frame into two phase-balanced currents in an orthogonal stationary frame in the same plane as the stator frame but the angle between the two axes is 90 degrees instead of 120 degrees. The transformation equation is given below. In this frame, the input currents are still the AC currents but not DC currents. How to make the AC currents into DC currents? As you know, if the frame is rotating in the same frequency as the currents, how about the currents? For example, if you go from one location to another location, you can walk, or you can take a car. When you take a car, and the car runs, you just stay in a car and do not need to run. Therefore, if the frame is rotating in the same frequency as the currents; the currents will become the constant currents. The second transformation is called as Park transformation and is given by equation below right. It transfers the stationary frame to the rotor frame to make the AC currents into DC currents. Therefore, vector control uses frame transformation to transfer three –phase AC currents into two-phase DC current so that we can directly control these two currents. Because these two currents are orthogonal and 90 degrees decoupling, they can’t interact each other. We can define one produces the flux and another produces the torque. In order to do this, we need to know the rotor position and orient the d-axis to align with the rotor position, and q –axis is ahead of d axis 90degree. Therefore, the vector control can make the stator field and rotor field to meet 90 degree in order to produce maximum torque. F is Magneto Motive Force  is the angle between d-axis and -axis © 2010 Renesas Electronics America Inc. All rights reserved.

Permanent Magnet Synchronous Motor (PMSM) Modeling
PMSM model at stationary system () Re-arranging last two equations Here is the three-phase PMSM motor modeling in ab stationary frame. The motor voltages and flux equations. The motor voltages equal the stator resistance voltage plus the back EMF. The flux equals the mutual flux and self induced flux. are the motor voltages are the motor fluxes are the motor currents is the motor mutual flux is the rotor position is the motor inductance © 2010 Renesas Electronics America Inc. All rights reserved.

Position Angle and Speed Estimation
If inductance L is ignored, then =0 Position angle can then be obtained from The flux equations can be rearranged by moving self induced flux to the left Because the phase inductance is normally small, the inductance contribution in the above equation can be ignored. Therefore, the rotor phase can be deduced from the flux components as follows: The motor speed can be deduced from derivative of angle. And Speed can be deduced from derivative of angle where  is the motor speed © 2010 Renesas Electronics America Inc. All rights reserved.

Renesas Voltage Model of Flux Observer
Flux observer is based on following equations According to the voltage equations, the magnetic flux can be obtained from applied voltages and measured currents simply by integration as follows: are the reference voltages and measured currents © 2010 Renesas Electronics America Inc. All rights reserved.

Position and Speed Observer
Flux estimation is made through cascaded low pass filters instead of direct integration First low pass filter Derivative Second low pass filter Low pass filter yn Derivative dn Instead of direct integration of back EMF, position estimation is calculated through the cascaded low-pass filters in order to remove the integration error and DC offset according to the flux equations: First low-pass filter Derivative Last low-pass filter Speed estimation is obtained from the phase difference and then filtered with a third-order low-pass filter built from three first-order low-pass filters in series. Speed is estimated from phase difference, then filtered with a third order low pass filter using three first order low pass filters. © 2010 Renesas Electronics America Inc. All rights reserved.

Renesas Sensorless Vector Control Strategy
Commanded speed Observed actual speed Clarke transform Park transform Inverse park transform Current loop Speed loop This block diagram also describes the functions required for FOC control. Error signals are formed using Id, Iq and reference values for each. The Id reference controls rotor magnetizing flux. The flux vector must be kept in alignment with the rotor magnetic poles at all times, so that the motor can produce the maximum torque. This is accomplished by a flux reference of zero. Keep in mind that Id and Iq (representing torque and flux) are only time-invariant under steady-state load conditions. The Iq reference controls the torque output of the motor. The outputs of the PI controllers provide Vd and Vq, which is a voltage vector that is sent to the motor. A new coordinate transformation angle is calculated based on the motor speed, rotor electrical time constant, Id and Iq. The FOC algorithm uses the new angle to place the next voltage vector, in order to produce an amount of torque needed to keep the rotor spinning. The Vd and Vq output values from the PI controllers are rotated back to the stationary reference frame, using the new angle. This calculation provides quadrature voltage values vα and vβ. Next, the vα and vβ values are transformed back to 3-phase values va, vb and vc. The 3-phase voltage values are used to calculate new PWM duty-cycle values that generate the desired voltage vector. There is no position or speed sensor as input. Current sensors and software voltages are used to estimate position and speed of the motor. I alpha and I beta are derived by current measurements from motor windings. V alpha and V beta are variables that we calculate during FOC. Those four variables are inputs to the position and speed estimator. © 2010 Renesas Electronics America Inc. All rights reserved.

SVC Implementation Overview
SVC uses complex coordinate transformations and motor mathematical model, which requires large amount of calculations. Thus SVC necessitates a fast MCU with high computing capability. Currently, most of the SVC implementations are based on the fixed-point MCUs or DSPs. A few of them adopt the floating point processors, the cores of those processors are actually fixed-point and they are thus softare library based floating point implementation and not hardware FPU implementation. Such software FPU implementation requires even more computing power from MCU. © 2010 Renesas Electronics America Inc. All rights reserved.

Features of RX62T High Performance and Low Power Consumption 32bit CPU (165 DMIPS) & Single precision FPU 100MHz Flash Access Supports both 3V and 5V systems Peripheral Functions Dedicated for Motor Control Enable to manage Two Motors simultaneously 12bit-ADC with 6 Sample & Hold Circuits Op. Amp and Comparators Various safety functions for System Level Safety Output port monitor Independent WDT ( On-chip OSC; 125kHz) Clock Stop Detection Ease of USE - Excellent Tool Chain Providing solution platform Easy & Quick start up *:Target Spec © 2010 Renesas Electronics America Inc. All rights reserved.

Safety Functions Items Specifications Supported by hardware CRC CRC
Independent WDT Counter-input clock: Dedicated low-speed 125kHz on-chip oscillator Clock Stop Detection Clock stop detection Output Port Monitor Reading out the states of pins is always possible. Self-diagnostic function The self-diagnostic function internally generates three analog input voltages A/D- converter Port Output Enable Shut off function for 6-pahse PWM output for Motor Control Control of the high-impedance state of the MTU3 and GPT’s waveform output pins © 2010 Renesas Electronics America Inc. All rights reserved.

* Target Specifications
Overview of RX62T RX600 CPU Core – 100MHz CISC CPU with Harvard Architecture 165 DMIPS at 100MHz Floating Point Unit (FPU) Multiply Accumulate (MAC) Low Power Consumption* 500 uA per MHz, all peripherals active Flash Memory 100 MHz, zero wait-state access Analog 4 ch x 2 units 12-bit ADC, 1 usec conversion 12 ch x10-bit ADC, dual sample-hold, 1 usec 3 Op. Amp and 3 Comparator Timers MTU3 16bit x 8chn General purpose PWM timer 16bit x 4ch Compare Much Timer 16bit x 4 chn Communication UART/Clock synchronous serial x 3Unit RSPI x 1 Unit , LIN I/F x 1Unit, I2C bus I/F 1 Unit RCAN 1unit(Option) Others Data Transfer Controller (DTC) POR, LVD On chip oscillator 125KHz±10% for independent WDT Package LQFP-100/64 (14x 14mm, 0.5mm pitch) * Target Specifications FLASH 256KB/ 128KB SRAM 16KB/ 8KB SCI x3 DATA FLASH 8KB CMT 16bit X 4chn WDT I2C x1 RSPI POR/LVD OSC 125Khz PLL ADC 12b 4ch, 3S/H 3OP Amp 3Comp ADC 10b 10ch, 2S/H GPIO w/MUX I-WDT EXT OSC DEBUG DTC ICU 100 MHz 165 DMIPS Harvard CPU FPU MAC MUL & DIV CRC MTU3 16bit x 8chn GPT RCAN (optional) TIMER MEMORY ANALOG CPU I/O © 2010 Renesas Electronics America Inc. All rights reserved.

Harvard Architecture Simultaneous execution of instruction fetches and memory accesses boosts pipeline performance … enables 1 clock per instruction ALU Divider Multiplier Shifter Data Interface Instruction 32-bit registers x16 Flash Fetch Memory Access RX CPU core RAM Separate buses allow parallel execution A Harvard architecture has two independent buses, one for Instruction fetches and one for memory accesses. With pipeline, this architecture allows CPU to reach 1 clock per instruction The two separate buses allow for parallel execution. The IF bus is 64-bit allowing for single cycle fetches of multi-byte instructions. The Memory bus is 32-bit. © 2010 Renesas Electronics America Inc. All rights reserved. 28

RX600 internal bus configuration
RX CPU ROM RAM TMR MTU SCI Instruction Bus Operand Bus DMAC DTC Internal main bus 1 Internal main bus 2 Internal peripheral bus External bus control External bus EXDMAC Operates in synchronization with ICLK E-DMAC Operates in synchronization with PCLK Operates in synchronization with BCLK AD USB Data Flash …. 32-bit Top-left you see the 2 Harvard CPU busses Bottom-right is peripheral bus (pink), which isolates the fast traffic on CPU busses from slower traffic on peripheral busses. The 2 high-speed internal main bussed in the middle allow rapid DMA movement of data without interfering with the CPU or peripheral busses. Very efficient way to pump data from place to place while keeping CPU performance high 2 dedicated CPU busses: instruction and operand 3 other main internal busses: simultaneous transfer of data from multiple masters © 2010 Renesas Electronics America Inc. All rights reserved.

Floating Point Unit Floating-Point Unit Dedicated Data Registers General Registers Typical Operation Load/Store RX Operation General Registers Floating-Point Unit No Load/Store Instructions Needed A Floating Point Unit is a real performance booster that is typically only found on high-end MPUs. Applications include PID controllers, instrumentation and sensors. IEEE 754 Binary Floating-Point Arithmetic The exceptions defined in IEEE 754 are also supported. Supports IEEE-754 Standard for Binary Floating-Point, 32-bit, Single-precision data format Addition, Subtract, Multiply, Divide, Integer-convert instructions using general registers are supported. © 2010 Renesas Electronics America Inc. All rights reserved. 30

Performance and Flash Speed
RX with 100 MHz Flash 　100 MHz　 Processing performance MCU frequency 　60 MHz　 Competing MCU with 30 MHz Flash 　30 MHz　 I have some actual RMPA performance measurements to show you, but before I do, this is a perfect time to discuss in more detail the effects of the native Flash operating speed vs. CPU performance. On the next slide I’ll show you how all of these are related. The RX family uses Renesas’s 90nm flash MONOS technology having the fastest access time of all embedded Flash memory in the MCU industry, at just 10nsec read time , or 100MHz. Because the Flash memory can provide instructions to the RX CPU at the same rate the CPU consumes them, there’s no need for memory acceleration techniques. <click>If we examine a pipelined processor running at 30 MHz coupled to a Flash memory with a native speed which is also 30 MHz, there are no pipeline stalls as shown here and performance is linear with clock speed. <click>However, once the CPU speed rises above 30 MHz, 1 wait-state must be added after the Instruction Fetch stage to wait on the slow flash <click>And again at every multiple of the native Flash speed. Each time reducing overall CPU performance as you can see on the graph<click> However, the RX can continue all the way up to 100MHz with no wait-states as shown You may say, “yes, but MCUs with slower flash memory will compensate by using a memory accelerator. Some have very wide Flash, up to 128-bits to fetch multiple instructions in one cycle to eliminate delays in sequential code. And for code branches they have a pre-fetch queue and branch cache mechanism to eliminate this performance hit.” Yes indeed, some do, but these techniques never fully compensate for the slow flash. The more elaborate the memory acceleration technique, the higher penalty you pay in terms of cost (silicon size), power consumption (128-bit flash bus is a lot of dynamic switching current), and determinism (what about cache misses?). Let’s look at a real-world example… <click> no wait 1 wait cycle 2 wait cycles © 2010 Renesas Electronics America Inc. All rights reserved.

RX-FPU Benchmarks Single precision operations are 1.5 times or more faster using FPU RX600 without FPU RX600 with FPU Comparison Single (Number of Cycle) (Number of Cycle) (No FPU/RX-FPU) precision Sinf 236 122 1.9 Cosf 246 118 2.1 Tanf 556 185 3.0 Asinf 1,330 186 7.2 Acosf 1,683 197 8.5 Atanf 230 154 1.5 Logf 249 168 1.5 Expf 223 138 1.6 Powf 5,018 619 8.1 © 2010 Renesas Electronics America Inc. All rights reserved.

FPU Example Example: Conversion of thermocouple reading to temperature
Thermocouple formula; Temperature = S (an * xn) n = 0 ~ 5; a0 ~ a5 are constants; x is A/D reading This data shows dramatic improvement with our on-chip FPU. RX with FPU is over 16x Faster and 20x Smaller than the “best in class” 32-bit RISC with FP libraries. > 16x Faster! > 20x Smaller! The FPU provides a dramatic increase in performance and code efficiency over math libraries. © 2010 Renesas Electronics America Inc. All rights reserved.

True Performance Approximately 2x faster than best in class RISC!
2.30 × 2.26 × 2nd WAIT 2nd WAIT 1.76 × Cycles w/ Wait States (normalized) 1st WAIT Max. Op. Freq. (normalized) Now let’s look at the true performance when wait states and maximum operating frequency are taken into account. Again, we have some of the customer programs that were used as benchmarks. Initially, the analysis of cycle count data without any wait states shows a slight improvement over the competition. However, once we take into account the 2 wait states incurred when running at higher frequencies, the cycle count increases significantly for the competition. Then when maximum operating frequency is applied (72MHz Vs. 100MHz for RX) there is another dramatic impact on the performance. The overall effect is that the RX can execute at 2 times that of the best in class RISC competition. * Benchmarking Disclaimer: Benchmarking results are dependent on many factors including the test environment, compiler used and its settings, the specific code itself, etc. Results will vary for different code under different conditions. NO WAIT STATES Approximately 2x faster than best in class RISC! © 2010 Renesas Electronics America Inc. All rights reserved.

Taking Advantages of FPU Implementation

Floating Point Math Advantages - Powerful floating point math
It represents real numbers over a much greater range. The scaling operations in multiplication, division and the trigonometric functions, which are very common in SVC algorithms, could be more efficiently carried out using floating-point values. The elimination of fixed-point math problems such as saturation, overflow, and scaling of parameters and variables. © 2010 Renesas Electronics America Inc. All rights reserved.

Floating Point Math Advantages - Performance Enhancement
The floating point architecture improves microcontroller performance in terms of execution time. The floating-point device performs all math operations much faster than the fixed-point device by almost two to three times. For the advanced motor control algorithm, it performs more math operations in shorter time. © 2010 Renesas Electronics America Inc. All rights reserved.

Floating Point Math Advantages - Software Development
The floating point format simplifies code writing and debugging. Floating-point numeric representations are more natural to mathematical operations than fixed-point and are thus more readily supported in high-level languages. Once the motor control algorithms are developed on PCs using high-level-abstraction tools such as Matlab, it can be directly ported to the FPU for further testing and check out on hardware platform. Without the FPU, these algorithms must be converted into the fixed-point and are thus expected to slow down dramatically when they are implemented from the PC to the embedded hardware. © 2010 Renesas Electronics America Inc. All rights reserved.

Fixed Point Development Dilemma
Motor control development Simulation usually starts with simulation Platform in Floating Point ( i . e . C , Matlab ) Take time to convert the code to fixed point ( one way ) Can be easily ported to floating point device ( bi - direction ) Fixed Point Algorithm Floating Point ( C or C ++) Algorithm ( C or C ++) Floating Point Unit Fixed Point Unit FPU makes vector control transformation, position and speed observer implementation easier and more accurate. © 2010 Renesas Electronics America Inc. All rights reserved.

Current Measurement by Assembly Code
Fixed-Point Implementation FPU Implementation Size Matters! Renesas Complier uses the FPU instructions and optimizes the FPU code to make the FPU Assembly code and the execution time much smaller. © 2010 Renesas Electronics America Inc. All rights reserved.

α,β to d&q Transformation
Fixed-Point Implementation FPU Implementation FPU makes the vector control transformation just like directly writing equations. Simple Implementation! © 2010 Renesas Electronics America Inc. All rights reserved.

Esay Implementation! Flux Observer Fixed-Point Implementation
FPU Implementation Esay Implementation! For FPU, no saturation and limits, and easily implemented. © 2010 Renesas Electronics America Inc. All rights reserved.

Motor Parameter Definitions
Fixed-Point Implementation FPU Implementation FPU uses the real values without any scaling and calculations. © 2010 Renesas Electronics America Inc. All rights reserved.

RX62T Testing Setup RX62T RSK Renesas Power Board

RX62N Testing Setup RX62N Eva-Board Renesas Power Board

Speed Profile (Actual Speed vs. Ref
Speed Profile (Actual Speed vs. Ref. Speed) from 12krpm to 30krpm at 20kHz PWM Frequency FPU Testing Results Fixed-Point Testing Results Speed regulation <250ms <500ms <250ms <500ms © 2010 Renesas Electronics America Inc. All rights reserved.

Current Acceleration and Deceleration during One Cycle from 12 to 30krpm at 20KHz PWM
<200ms <250ms 250ms rising time 250ms falling time © 2010 Renesas Electronics America Inc. All rights reserved.

CPU Bandwidth and Code Size Comparison at 10KHz PWM Frequency
Fixed-Point SVC FPU SVC Sine, Cosine, Atan functions 38% 23% Sine, Cosine, Atan tables 26% 18% Code Size Fixed-Point SVC FPU SVC Sine, Cosine, Atan functions 14.273K 7.222K Sine, Cosine, Atan tables 12.462K 6.211K © 2010 Renesas Electronics America Inc. All rights reserved.

Conclusions An FPU based sensorless vector control has been developed and implemented based on Renesas’s floating point MCU of RX series. The advantages of FPU are evident: it simplifies the implementation, modification, debugging, maintenance, and re-use of SVC; it increases the position and speed estimation accuracy thus makes SVC more accurate; and it further improves the control performance and brings about less current harmonics, better speed regulation, and lower noise. Experiments also demonstrate that the CPU bandwidth usage of the FPU SVC is reduced significantly in comparison with the fixed-point SVC, and the code size of the FPU SVC is only half of the fixed-point SVC, which makes it possible to use an MCU with smaller flash size thus lowering the cost. © 2010 Renesas Electronics America Inc. All rights reserved.

RX FPU SVC Innovation High efficiency Low cost High performance
Home Appliances Green Power FPU Sensorless Vector Control High performance High Accuracy Industrial Automation Automotive, Health Medicals © 2010 Renesas Electronics America Inc. All rights reserved.

Huangsheng Xu Sr. Staff Engineer, Consumer & Industry BU

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