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Published byJohn McDaniel Modified over 10 years ago
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Giano Introduction to Alessandro Forin Microsoft Research
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Take-aways Giano is the first Real-Time Simulation Framework for hardware-software co-development Uses Microsoft Visio as the graphing and execution UI Configurations are Platform XML files Nodes in the graph are separate, user-defined DLLs Properties are user-defined and node-specific Lots of functionality pre-built into the base framework 70+ working modules, 20+ systems, 4 years internal use Source, free for academic use at http://research.microsoft.com/downloads
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Hw/Sw Co-Development? a)Develop or synthesize hardware and software at the same time b)Simulate a full system before it is ready c)Use C-models and/or HDL-models to define behaviors d)All of the above Giano
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ModelSim processGiano process CPU MEM I/O ARM: At91m63200 Xilinx: Spartan3 Optional: Icarus Verilog Interpreter FPGA: vvp.dll NamedPipe GIANO PLI plug-in (VPI) NamedPipe client Optional: external devices (LabView) PLI plug-in (VPI) Start = TheCounter->Value;...compute... End = TheCounter->Value; module test; always @(posedge clock) counter = counter + 1;
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AES components, sw/hw Base RTOS Test program and data ICipher implementation AES component ARM MicrocontrollerXilinx FPGA
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Real-Time Simulation Definition Realize a software system that matches the temporal behavior of the hardware+software system being simulated, using the same time- ordered sequence of inputs Applicable to hybrid hw+sw simulators too Requires: –Clock adaptation –I/O adaptation
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Clock Adaptation Problem: Output a character every second Timer too slow/fast? Incorrect Host load changes? Erratic Solution: Rate-limit the clock using introspection and adaptation
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Rate-limiting the Clock 1.Every M (10**3) clock ticks spin idle for D microseconds 2.Every N (10**6) clock ticks check the actual frequency against the target frequency, adjust the delay D
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Adjusting the Delay factor
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Effect on IPS
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I/O adaptation Problem: 9600 baud serial line From disk trace? too fast From user? too slow From real serial line? depends Solution: –Link to rate-limited clock –Adapt using events and notifications
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Example: Programmable Timer void TcDevice::Event(GIANO_EVENT *Event) { PTC_STATE State = &this->TcState; UINT32 BaseCount = (UINT32) Event->Arg2; if (Event == &Notification) { CalibrateTc( (UINT32) Event->Arg1 ); return; } // trigger interrupt if enabled State->Control |= TCCT_INTERRUPT; if (State->Control & TCCT_ENABLE) ParentBus->Interrupt( InterruptNumber, true); …..
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Take-aways Giano is the first Real-Time Simulation Framework for hardware-software co-development Uses Microsoft Visio as the graphing and execution UI Configurations are Platform XML files Nodes in the graph are separate, user-defined DLLs Properties are user-defined and node-specific Lots of functionality pre-built into the base framework 70+ working modules, 20+ systems, 4 years internal use Source, free for academic use at http://research.microsoft.com/downloads
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Visio Diagrams Atmel EB63 Evaluation Board
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Apple Power Mac G5 Multi-processors
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Take-aways Giano is the first Real-Time Simulation Framework for hardware-software co-development Uses Microsoft Visio as the graphing and execution User Interface Configurations are Platform XML files Nodes in the graph are separate, user-defined DLLs Properties are user-defined and node-specific Lots of functionality pre-built into the base framework 70+ working modules, 20+ systems, 4 years internal use Source, free for academic use at http://research.microsoft.com/downloads
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Per-node Properties Create/edit as Visio Custom Properties Values are Unicode strings and numbers Only the Implementation is required Any property can be overridden on the command line
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Giano Engine Parses the XML configuration graph Instantiates the modules as DLLs Exports a few support classes to the modules
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Platform XML
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Take-aways Giano is the first Real-Time Simulation Framework for hardware-software co-development Uses Microsoft Visio as the graphing and execution UI Configurations are Platform XML files Nodes in the graph are separate, user-defined DLLs Properties are user-defined and node-specific Lots of functionality pre-built into the base framework 70+ working modules, 20+ systems, 4 years internal use Source, free for academic use at http://research.microsoft.com/downloads
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Core Functionalities Central clock, linked to CPU #0 Real-Time calibration, both CPUs and I/O Eventing and dynamic re-calibration Mapping to the hosts physical devices Large simulated guest memory (512 MB and up) Symbol tables with load/unload Tracing and basic-block profiling Graph management, with hot-plugging MP interlocks
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CPUs ARM & Thumb, MIPS (both endians), PowerPC SimpleScalar, PolyScalar, Cacti In-Circuit Emulation (ICE), 2 JTAG Traps, external interrupts, resets Pluggable MMUs: one software, one in Verilog All interpreters (so far), all MultiProc Self-testing against Oracle machines ~20 Million instructions per second Settable lower speed (25MHz ~> 5 MIPS)
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Busses PCI, AGP, EBI, MPI, root bus Test case generator (MIPS) Optimized routing, always one-hop away. Aliasing and multi-mapping Interrupt routing Support hot-plug/unplug of modules
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Memory RAM, ROM, FLASH, Serial Flash Boot images and overlays Arbitrary transaction sizes Accessible from any module (DMA!) Buffer pinning Large, contiguous virtual segment for best performance Aliasing
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Peripherals, examples 2D-graphic, 2 LCDs, keyboard, mouse, sound card A/D and D/A converters, gyroscope Ethernet, FireWire, Serial lines IDE and ATAPI disks 3 interrupt controllers and 3 timers GPIO with buttons, LEDs, Serial Flash Power/System management chips [with fan ] FPGA interface to ModelSim/Icarus Watchdog, Debug modules Do-nothing module for unimplemented parts
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Take-aways Giano is the first Real-Time Simulation Framework for hardware-software co-development Uses Microsoft Visio as the graphing and execution UI Configurations are Platform XML files Nodes in the graph are separate, user-defined DLLs Properties are user-defined and node-specific Lots of functionality pre-built into the base framework 70+ working modules, 20+ systems, 4 years internal use Source, free for academic use at http://research.microsoft.com/downloads
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