1. Lecture 3. Error Detection and Correction, Logic Gates Prof. Sin-Min Lee Department of Computer Science 2x

2. 4–2 Chapter Goals Error Detection and Correction Identify the basic gates and describe the behavior of each Combine basic gates into circuits Describe the behavior of a gate or circuit using Boolean expressions, truth tables, and logic diagrams

3. 4–3 Error Detection EDC= Error Detection and Correction bits (redundancy) D = Data protected by error checking, may include header fields Error detection not 100% reliable! protocol may miss some errors, but rarely larger EDC field yields better detection and correction

4. 4–4 Parity Checking Single Bit Parity: Detect single bit errors Two Dimensional Bit Parity: Detect and correct single bit errors 0 0

5. 4–5 Internet checksum Sender: treat segment contents as sequence of 16-bit integers checksum: addition (1’s complement sum) of segment contents sender puts checksum value into UDP checksum field Receiver: compute checksum of received segment check if computed checksum equals checksum field value: –NO - error detected –YES - no error detected. But maybe errors nonetheless? More later …. Goal: detect “errors” (e.g., flipped bits) in transmitted segment (note: used at transport layer only)

6. 4–6 Checksumming: Cyclic Redundancy Check view data bits, D, as a binary number choose r+1 bit pattern (generator), G goal: choose r CRC bits, R, such that – exactly divisible by G (modulo 2) –receiver knows G, divides by G. If non-zero remainder: error detected! –can detect all burst errors less than r+1 bits widely used in practice (ATM, HDCL)

7. 4–7 CRC Example Want: D. 2 r XOR R = nG equivalently: D. 2 r = nG XOR R equivalently: if we divide D. 2 r by G, want remainder R R = remainder[ ] D.2rGD.2rG

8. 4–8 What is a gate? Combination of transistors that perform binary logic So called because one logic state enables or “gates” another logic state For each gate, the symbol, the truth table, and the formula are shown

9. 4–9

10. 4–10

11. 4–11

12. 4–12

13. 4–13

14. 4–14 Computers There are three different, but equally powerful, notational methods for describing the behavior of gates and circuits –Boolean expressions –logic diagrams –truth tables

15. 4–15 Boolean algebra Boolean algebra: expressions in this algebraic notation are an elegant and powerful way to demonstrate the activity of electrical circuits

16. 4–16 Logic diagram: a graphical representation of a circuit –Each type of gate is represented by a specific graphical symbol Truth table: defines the function of a gate by listing all possible input combinations that the gate could encounter, and the corresponding output Truth Table

17. 4–17 Gates Let’s examine the processing of the following six types of gates –NOT –AND –OR –XOR –NAND –NOR

18. 4–18 NOT Gate A NOT gate accepts one input value and produces one output value Figure 4.1 Various representations of a NOT gate

19. 4–19 NOT Gate By definition, if the input value for a NOT gate is 0, the output value is 1, and if the input value is 1, the output is 0 A NOT gate is sometimes referred to as an inverter because it inverts the input value

20. 4–20 AND Gate An AND gate accepts two input signals If the two input values for an AND gate are both 1, the output is 1; otherwise, the output is 0 Figure 4.2 Various representations of an AND gate

21. 4–21 OR Gate If the two input values are both 0, the output value is 0; otherwise, the output is 1 Figure 4.3 Various representations of a OR gate

22. 4–22 XOR Gate XOR, or exclusive OR, gate –An XOR gate produces 0 if its two inputs are the same, and a 1 otherwise –Note the difference between the XOR gate and the OR gate; they differ only in one input situation –When both input signals are 1, the OR gate produces a 1 and the XOR produces a 0

23. 4–23 XOR Gate Figure 4.4 Various representations of an XOR gate

24. NAND and NOR Gates The NAND and NOR gates are essentially the opposite of the AND and OR gates, respectively Figure 4.5 Various representations of a NAND gate Figure 4.6 Various representations of a NOR gate

25. 4–25

26. 4–26

27. 4–27

28. 4–28 Gates with More Inputs Gates can be designed to accept three or more input values A three-input AND gate, for example, produces an output of 1 only if all input values are 1 Figure 4.7 Various representations of a three-input AND gate

29. 4–29 3-Input And gate A B C Y 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 1 0 0 1 1 Y = A. B. C

30. 4–30 Constructing Gates A transistor is a device that acts, depending on the voltage level of an input signal, either as a wire that conducts electricity or as a resistor that blocks the flow of electricity –A transistor has no moving parts, yet acts like a switch –It is made of a semiconductor material, which is neither a particularly good conductor of electricity, such as copper, nor a particularly good insulator, such as rubber

31. 4–31 Circuits Two general categories –In a combinational circuit, the input values explicitly determine the output –In a sequential circuit, the output is a function of the input values as well as the existing state of the circuit As with gates, we can describe the operations of entire circuits using three notations –Boolean expressions –logic diagrams –truth tables

32. 4–32 Combinational Circuits Gates are combined into circuits by using the output of one gate as the input for another Page 99 AND OR

33. 4–33 Combinational Circuits Because there are three inputs to this circuit, eight rows are required to describe all possible input combinations This same circuit using Boolean algebra: (AB + AC) jasonm: Redo to get white space around table (p100) jasonm: Redo to get white space around table (p100) Page 100

34. 4–34 Now let’s go the other way; let’s take a Boolean expression and draw Consider the following Boolean expression: A(B + C) jasonm: Redo table to get white space (p101) jasonm: Redo table to get white space (p101) Page 100 Page 101 Now compare the final result column in this truth table to the truth table for the previous example They are identical

35. 4–35 Simple design problem A calculation has been done and its results are stored in a 3-bit number Check that the result is negative by anding the result with the binary mask 100 Hint: a “mask” is a value that is anded with a value and leaves only the important bit

36. 4–36 Using And gates to mask

37. 4–37 Shorthand way to draw this If the values shown had 32 bits, you would have a lot of wires and and gates on the drawing. Here is a shorthand way to draw this:

38. 4–38 Masked value Using And gates to mask

39. 4–39 & and && in Java, C, C++ & means AND, bit-by-bit What we just did was the equivalent of Y = A & B && means AND, on a word, boolean basis 101 && 010 is true 101 & 010 is zero

40. 4–40 Now let’s go the other way; let’s take a Boolean expression and draw We have therefore just demonstrated circuit equivalence –That is, both circuits produce the exact same output for each input value combination Boolean algebra allows us to apply provable mathematical principles to help us design logical circuits

41. 4–41 Properties of Boolean Algebra jasonm: Redo table (p101) jasonm: Redo table (p101) Page 101

42. 4–42 Adders At the digital logic level, addition is performed in binary Addition operations are carried out by special circuits called, appropriately, adders

43. 4–43 Adders The result of adding two binary digits could produce a carry value Recall that 1 + 1 = 10 in base two A circuit that computes the sum of two bits and produces the correct carry bit is called a half adder Notice the Sum & Carry are NEVER both 1. jasonm: Redo table (p103) jasonm: Redo table (p103) Page 103 (XOR)(AND)

44. 4–44 Adders Circuit diagram representing a half adder Two Boolean expressions: sum = A  B carry = AB Page 103

45. 4–45 Adders A circuit called a full adder takes the carry-in value into account Figure 4.10 A full adder

46. 4–46 Adding Many Bits To add 2 8-bit values, we can duplicate a full-adder circuit 8 times. The carry-out from one place value is used as the carry in for the next place value. The value of the carry-in for the rightmost position is assumed to be zero, and the carry-out of the leftmost bit position is discarded (potentially creating an overflow error).

47. 4–47 How to use NOR gate to build a NOT gate? Truth Table ABCQ 0001 1110 Hint! Link inputs B & C together (to a same source). A Q B C When A = 0, B = C = A = 0 When A = 1, B = C = A = 1

48. 4–48 How to use NOR gates to build an OR gate? Truth Table Hint 1 : Use 2 NOR gates A Q B C Hint 2 : From a NOR gate, build a NOT gate Hint 3 : Put this “NOT” gate after a NOR gate D E ABCDEQ 001110 010001 100001 110001 NOR NOT

49. 4–49 How to use NOR gates to build an AND gate? Truth Table Hint 1 : Use 3 NOR gates Hint 2 : From 2 NOR gates, build 2 NOT gates Hint 3 : Each “NOT” gate is an input to the 3 rd NOR gate ABCDQ 00110 01100 10010 11001 A B C D Q

50. 4–50 How to use NOR gates to build a NAND gate? Truth Table Hint 2 : Use 3 NOR gates to build a NAND gate (previous lesson) Hint 3 : Use the 4 th NOR gate to build a NOT gate Hint 4 : Insert “NOT” gate after “NAND” gate Hint 5 : NOT-NAND = AND Hint 1 : Use 4 NOR gates A B C D Q E ABCDEQ 001101 011001 100101 110010

51. 4–51 How to use NAND gates to build a NOT gate? Truth Table Hint! Link inputs B & C together (to a same source). When A = 0, B = C = A = 0 When A = 1, B = C = A = 1 A Q C B ABCQ 0001 1110

52. 4–52 How to use NAND gates to build an AND gate? Truth Table A Q B ABCQ 0010 0110 1010 1101 C Hint 1 : Use 2 NAND gates Hint 2 : From a NAND gate, build a NOT gate Hint 3 : Put this “NOT” gate after a NAND gate NAND NOT Hint 4 : NOT-NAND = AND

53. 4–53 How to use NAND gates to build an OR gate? Truth Table ABCDQ 00110 01101 10011 11001 Hint 1 : Use 3 NAND gates Hint 2 : Use 2 NAND gates to build 2 NOT gates Hint 3 : Put the 3 rd NAND gate after the 2 “NOT” gates A B C D Q

54. 4–54 How to use NAND gates to build a NOR gate? Truth Table ABCDEQ 001101 011010 100110 110010 Hint 1 : Use 4 NAND gates Hint 2 : Use 3 NAND gates to build an OR gate Hint 3 : Use a NOR gate to build a NOT gate A B C D Q E Hint 4 : Put the “NOT” gate after “OR” gate

55. 4–55

56. 4–56

57. 4–57 as Universal Logic Gates Any logic circuit can be built using only NAND gates, or only NOR gates. They are the only logic gate needed. Here are the NAND equivalents: NAND and NOR

58. 4–58 NAND and NOR as Universal Logic Gates (cont) Here are the NOR equivalents: NAND and NOR can be used to reduce the number of required gates in a circuit.

59. 4–59 Chapter Two Appendix A A.2,A.3,A.4, A.5 Practice Assignment P.498 A.1,A.2,A.3,A.4,A.5,A.6