# Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Spezielle.

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Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Spezielle Anwendungen des VLSI-Entwurfs Special applications of VLSI design Prof. Dirk Timmermann, Claas Cornelius, Stephan Kubisch, Frank Sill, and Harald Widiger Course and contest Student: Enrico Daum

Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Spezielle Anwendungen des VLSI-Entwurfs Special applications of VLSI design Goal – Group ET/ITTI Given: Simple description of 16x16 bit multiplier in VHDL Task: Modification of VHDL description so that no multiplier symbol (*) will be used Multiplication in multiple clock cycles Optimization for frequency * 1/energy (energy per clock cycle)

Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Spezielle Anwendungen des VLSI-Entwurfs Special applications of VLSI design VHDL Problem Solving Break it down into its sub-components Multiply = Shift and Add Example: 1 0 1 1 * 1 0 1 0 0 0 0 0 1 0 1 1 0 0 0 0 + 1 0 1 1 1 1 0 1 1 1 0

Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Spezielle Anwendungen des VLSI-Entwurfs Special applications of VLSI design Multiplication- array Example: n = 3 X = X0, X1, X2 Y = Y0, Y1, Y2 Result !!! (X2 * 4) * Y (X1 * 2) * Y X0 * Y CSA RCA

Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Spezielle Anwendungen des VLSI-Entwurfs Special applications of VLSI design Design Implement Carry Save Adders (Chain of full- adders, that generate SUM and CARRY) Using a Ripple Carry Adder to add Sum- sequence and Carry- Sequence Unlike the normal adders (e.g., ripple-carry adder(RCA) and carry- lookahead adder(CLA)), a CSA contains no carry propagation. Consequently, the CSA has the same propagation delay as only one FA delay (compared to RCA's n FA delay where n is the bit-width), and the delay is constant for any value of n.

Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Spezielle Anwendungen des VLSI-Entwurfs Special applications of VLSI design Results Max. frequency : 127 MHz Propergation delay : ? Power delay product : ? Area: ? Delay path: 14 CSA & 16 RPA stages The use of pipelining results in a large area- overhead (register the inputs, sums and carrys in every step)

Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Spezielle Anwendungen des VLSI-Entwurfs Special applications of VLSI design Perspective Ripple Carry Adder is the critical component For large multiplication use other adders like Carry look ahead Problems Arrangment of the wiring of all components Difficult to find errors

Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Spezielle Anwendungen des VLSI-Entwurfs Special applications of VLSI design

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