1. W.Skulski Phobos Workshop April /2003 Firmware & software development Digital Pulse Processor DDC-8 (Universal Trigger Module) Wojtek Skulski University of Rochester

2. W.Skulski Phobos Workshop April /2003 Outline What tools are available? What needs to be programmed? 1. GUI. 2. Embedded  processor (8051 derivative). 3. Digital signal processing FPGA.

3. W.Skulski Phobos Workshop April /2003 Software and firmware development tools Entry-level software development. All development tools are free. FPGA: XILINX WebPack ISE. Embedded micro: Keil C compiler, code restricted to 4kB. PC GUI: Shareware edition of BlackBox Component Builder. Expert-level software development. All tools discounted for universities. FPGA. VHDL tools: XILINX ISE, full version. Graphical tools: MatLab and XILINX System Generator. Embedded micro: Keil C compiler, full version. PC GUI: Full edition of BlackBox Component Builder.

4. W.Skulski Phobos Workshop April /2003 micro processor FPGA Communication with XLM (if using the combo system).

5. W.Skulski Phobos Workshop April /2003 Programming the GUI GUI development system: BlackBox Component Builder Very robust. No memory leaks. No dangling pointers. Custom graphics. USB interface. Free for education.

6. W.Skulski Phobos Workshop April /2003 Programming the embedded  processor Embedded micro development system: Keil 8051 C compiler Free intro version. Full version not free (University discount is available). Cypress USB framework. Debugger + monitor available. Has to be done carefully.

7. W.Skulski Phobos Workshop April /2003 Using FPGAs for Digital Signal Processing What is the advantage of the FPGA over a classic processor? FPGA is highly parallel, hence better performance. Data processing can be pipelined. FPGA becomes an application-specific “custom processor”. More I/O lines than any processor -> wide data paths. What is the disadvantage? More tedious and error prone. Only integer math is supported, no floating point. We know how to program processors, we are learning FPGAs only now. Programming FPGAs has to be done very carefully.

8. W.Skulski Phobos Workshop April /2003 Programming the FPGA Several design methods. 1. Schematic entry “by hand”. Suitable for small designs. 2. VHDL programming language. Powerful, but tedious. 3. Automatic “core generator”. Precompiled “cores” are instantiated. 4. Graphical LabView-like environment running under MatLab. Design environments. A. Free intro version WebPack, only schematic entry and VHDL are provided. B. Expensive full version ISE XST (University discount is available). Full version = WebPack + Core Generator. C. LabView-like MatLab and Simulink environment from MathWorks, Inc. Programming FPGAs has to be done very carefully.

9. W.Skulski Phobos Workshop April /2003 Programming the FPGA using schematic FPGA development system: XILINX ISE

10. W.Skulski Phobos Workshop April /2003 Programming the FPGA in VHDL FPGA development system: XILINX ISE

11. W.Skulski Phobos Workshop April /2003 Programming the FPGA using Core Generator FPGA development system: XILINX ISE

12. W.Skulski Phobos Workshop April /2003 FPGA Graphical Design Environment Matlab+Simulink (MathWorks) & System Generator (XILINX) Slide provided by Steve Pauly spauly@ris-corp.com

13. W.Skulski Phobos Workshop April /2003 FPGA Graphical Design Methodology Draw block diagram Simulate design Modify diagram Generate VHDL Implement into FPGA Create bit file Program FPGA Slide provided by Steve Pauly spauly@ris-corp.com

14. W.Skulski Phobos Workshop April /2003 Pulse can be integrated on the fly Pedestal can be subtracted on the fly Digital pulse processing in the FPGA Baseline-corrected pulse integral available about 400ns after the input pulse, assuming that all three sums are 100ns long. (Why 400? Remember 300ns latency.) t 0 +400ns

15. W.Skulski Phobos Workshop April /2003 Signal from a pocket NIM pulser digitized with the DDC-8 at 40 Msamples/s * 10 bits Excellent response to a very fast pulse seen with the “spy channel” Reminder concerning 300ns latency t pulse < t sampling. Digitization made possible by the Nyquist filter f filter = 1/4 f sampling Latency = 300ns. Input pulse t 0 +300ns

16. W.Skulski Phobos Workshop April /2003 Summary Three major subsystems to be programmed. Host PC, embedded microprocessor, FPGA. Robust, industrial-grade programming tools. Both the PC and the embedded micro tools are traditional. The integrated compiler, debugger, etc. The FPGA programming is new to us. The promising avenue: graphical FPGA programming. Firmware & software development will take time.