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The GreenHills Tool Chain

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Presentation on theme: "The GreenHills Tool Chain"— Presentation transcript:

1 The GreenHills Tool Chain
Multi 2.1/3.5 Differences Build Environment Overview Build Through Debug Review Linking Files ROM and RAM Execution Multi 2000 Configuration 7-1

2 Multi 2.1/3.5 - Directory Structure
Multi v2.1 C:\green \libsrc \armtsf \armtsfb Multi v3.5 C:\ghs \libsys \arm4 \arm4b 7-2

3 Multi 2.1/3.5 - System Library
System related functions libsys.a Contains customized IO stubs ind_io.c No longer replace system library in GHS directory /ghs/arm4b/libsys.a New custom GHS library ghs.o Replaced io file during final link na2.bld 7-3

4 Multi 2.1/3.5 - Build File Compatible with multi2000 v3.5
na1.bld, na2.bld, bsp.bld, … Automatically upgraded format when modified Insert additional files Options are added or removed byteorder bigendian c_options New format not compatible with v2.1 Using an editor to avoid format change Wordpad ultraedit 7-4

5 Multi 2.1/3.5 – new Compiler Stricter compliance to C standard
Casting variable types Additional warnings generated No line feed Variable used when not initialized Variable not used NETOS files cleaned bsp, header files, examples 7-5

6 Overview of Multi 2000 Build Environment

7 Major Components By Green Hills Software
Integrated Development Environment (IDE) Includes Builder Compiler Linker Editor Source Debugger Version Control Run-Time Error Checking 7-7

8 Builder Window This is the main builder window 7-8

9 Graphical User Interface
Multi-2000 provides a color-assisted text editor 7-9

10 Adding files to the project
C files and libraries are added to the project simply by a multi-selectable dialog window 7-10

11 Build Through Debug Review

12 Building the project Once all files are present in project workspace, building is readily done 7-12

13 Connecting to Target (1of 3)
In the Builder, choose Remote > Connect to Target. 7-13

14 Connecting to Target (2 of 3)
Enter OCDSERV command line. 7-14

15 Connecting to Target (3 of 3)
Two new windows IN/OUT –Displays Printf’s TARGET—can read/write to Memory/CPU 7-15

16 Starting Debugger In the Builder select Debug > debug 7-16

17 Debugger Features Set Break Points-Software and Hardware
Step through code Examine C-code Examine Interlaced Assembly Examine values of variables, registers, memory 7-17

18 Debugger Windows Interlaced Assembler displayed Color enhanced buttons

19 Download code to Target
Click “play” button or (F5) 7-19

20 Run Program Program is Running Use breakpoints or step through code

21 Breakpoints NET+OS supports both software and hardware breakpoints.
Software breakpoints (instruction fetches) are only possible while debugging from RAM Actual instruction is replaced with a special bit pattern that forces the ARM into debug mode. Unlimited number of software breakpoints available. Hardware breakpoints (data accesses) are possible while debugging from RAM or ROM. Triggered by particular address access. Maximum of one hardware breakpoint at a time. (Green Hills Limitation) 7-21

22 Software Breakpoints Adding a software breakpoint takes one click!

23 Hardware Breakpoints Hardware breakpoints installed via entering address or symbol name, r/w/x. 7-23

24 Debugging in a multi threaded operating environment – ThreadX Tools
Multi-2000 has a number of specific tools for debugging and analyzing ThreadX. 7-24

25 ThreadX Tools 7-25

26 ThreadX Tools 7-26

27 Linking Files 7-27

28 Introduction The linker places text & data into the appropriate sections of memory, as defined by the User-supplied section map, or Default linker section map Application can benefit by splitting the program into sections such that it will more readily support different types of memories. Factors include: Speed of parts (performance requirements) Cost & availability 7-28

29 Linker Directives File
Major GHS supplied linker directives: .picbase Base of text sections .text Program text .rodata Read-only data .rosdata Small, read-only data .secinfo Information on section layout of the program .data Initialized variables .bss Zero-initialized variables .heap Size and location of runtime heap .stack Size and location of runtime stack 7-29

30 Linker Directives File (cont.)
NETSilicon provided linker directives Common linker attributes align(expr) - Section will start on first expr-byte aligned address following previous section pad(expr) - Linker will reserve expr bytes for this section in memory ROM(expr) - Section becomes a ROMmable copy of expr. Section inherits the attributes and data of expr, while expr is modified to reserve address space only (as if it were all padding with no data) .netosstack Stack for each processing mode, grows downward. Please refer to init.s .free_mem Area of memory used by the THREADX kernel to create timer and root threads. This should not be used for any other purpose The following is from netos\examples\nahttp\debug.lx -sec { .reset x : .picbase 0x4000 : .romreset ROM(.reset) : .text : .intercall : .interfunc : .syscall : .fixaddr : .fixtype : .rodata : .romdata ROM(.data) : .romsdata ROM(.sdata) : .secinfo : .pidbase align(16) : .sdabase : .sbss : .sdata : .data : .bss : .heap align(16) pad(0x100000) : .stack align(16) pad(0x2000) : .netosstack align(16) pad(0x10000) : .free_mem align(16) pad(0x10000) : } 7-30

31 ROM and RAM Execution 7-31

32 Basic RAM & ROM requirements for NET+OS
512KB – 1MB Flash Recommended Primarily for code storage Code execution for low-end applications 2MB – 8MB RAM Recommended Data buffering for DMA channels Thread stacks Heap Place holder for new image download Code execution for higher-end applications 7-32

33 System Memory Map Memory Range Memory Device Cache Option

34 System Memory Map BSP provided memory map is designed with cache in mind. Same map will work with or without cache. Entire memory map configured using 2 control registers per chip select. Address bit masking allows for multiple memory images – ideal for setting up cacheable regions. 7-34

35 Relative application speed
FLASH memory typically ns read access time. Can decrease access time to 35-50ns by leaving flash chip “on” all the time. SDRAM typically 7-10ns access time. Running from RAM is typically faster. 7-35

36 Supporting FTP FLASH upgrade
FTP server must be running out of either Flash or RAM. FLASH update is invoked by an FTP client requesting to “put” file of special keyword filename. File is transferred to Net+ARM system memory buffer (RAM). A subsequent procedure, running in RAM, burns Flash with this new image. Running in RAM is the key to this step. 7-36

37 Project Structure Note ramimagezip.bld is main project, including only subproject, linker. -> Also includes project options. -> Inherits additional options from a parent project. 7-37

38 ramimagezip.bld - what it looks like
#!build default: program :elxr_map_option=map :elxr_map_option=numeric_sort :postexec=gmemfile -s ramimagezip -o ram.bin :postexec=compress ram.bin ramimagezip.bin :postexec=bin2obj ramimagezip.bin .\zobjs\ramimagezip.o project.bld subproject ramimagezip.lx linker_file 7-38

39 project.bld - contents Note the hierarchy - project.bld includes only source files and libraries. Conclusion - the same project.bld can be used with several programs. 7-39

40 project.bld - what it looks like
na1.lib library na2.lib bsp.a tcpip.a tx.a appconf.h include_file #!build default: subproject root.c C bsproot.c dialog.c decompress.c reset.s assembly cont… 7-40

41 3 Ways to Run… ramimagezip rom romzip Boot Execution RAM* ROM ROM
Application Execution RAM ROM RAM *Note - Executable downloaded with Debugger 7-41

42 Run-time Physical Memory Mapping
0xFFFF FFFF Device Physical Address IGNORE FOR NOW 32-bit Internal Address Space 0x001F FFFF 0x021F FFFF CS0 (Flash) 0x 0x Unmapped 0x00FF FFFF 0x00FF FFFF CS1 (RAM) 7-42 0x 0x

43 ramimagezip Executable Location
0xFFFF FFFF IGNORE FOR NOW 32-bit Internal Address Space CS0 (Flash) Unmapped 0x00FF FFFF CS1 (RAM) Executable Location 7-43 0x

44 Memory Map - ramimagezip
CS1(RAM) Top of Physical RAM Unused unknown until link Initialized r/w Data Constant Data Text (instructions) .picbase 0x Unused stack heap bss data Explicitly defined in linker file (ramimagezip.lx) unknown until link Data Section .sdabase 0x Vector Table .pidbase 0x 7-44

45 rom.bld Executable Location
IGNORE FOR NOW 32-bit Internal Address Space 0x02FF FFFF CS0 (Flash) 0x Unmapped Executable Location 0x00FF FFFF CS1 (RAM) 0x 7-45

46 Rom-based Memory Map - rom.bld
Top of Physical Flash Unused CS0 (Flash) Initialized r/w Data Constant Data Text (instructions) .picbase 0x Top of Physical RAM Unused stack heap bss data CS1 (RAM) Data Section .sdabase 7-46 Vector Table .pidbase 0x

47 ROM Compression - romzip.bld
romzip is the small bootloader that will reside at beginning of Flash, uncompressed. -> It is also the parent project of ramimagezip.bld. 7-47

48 romzip.bld - what it looks like
#!build default: program :c_option=noasmwarn :elxr_map_option=numeric_sort :arm_option=bigendian :arm_cputype=arm7tm :object_dir=.\zobjs :driver_opts=-map entry=Reset_Handler_ROM :sourcedirs=.\..\..\..\bsp :sysincdirs=.\..\..\..\..\h :sysincdirs=.\..\..\..\..\h\threadx :defines=NET_OS :defines=ENABLE_FLASH_COMPRESSION :postexec=gmemfile -s romzip -o romzip.bin reset.s assembly decompress.c C .\..\loader.c .\zobjs\ramimagezip.o object_file bsp.a library .\..\romzip.lx linker_file .\..\ramimagezip.bld program Custom 7-48

49 romzip.bld Executable Location
Same as rom.bld IGNORE FOR NOW 32-bit Internal Address Space 0x02FF FFFF CS0 (Flash) 0x Unmapped Executable Location 0x00FF FFFF CS1 (RAM) 0x 7-49

50 CS0 (Flash) Same as rom.bld CS1 (RAM) Memory Map - romzip.bld Unused
Top of Physical Flash Unused CS0 (Flash) Initialized r/w Data Constant Data Text (instructions) Same as rom.bld .picbase 0x Top of Physical RAM Unused stack heap bss data CS1 (RAM) Data Section .sdabase 7-50 Vector Table .pidbase 0x

51 ramimage.o location, pre-decompression
CS0 (Flash) Unused ramimage.o Compressed ramimage Linked with ramimage.lx Symbol name ram_buffer_0 Initialized r/w Data Constant Data Text (instructions) .picbase 0x 7-51

52 Decompression and Relocation
CS1 (RAM) CS0 (Flash) Unused Unused Initialized r/w Data decompress.c Initialized r/w Data Constant Data Text (instructions) Constant Data RAMIMAGE_START .picbase* Text (instructions) Unused 0x stack heap bss data *RAMIMAGE_START must match .picbase as defined in ramimagezip.lx !!! After relocation, flash is no longer used, and execution starts at .picbase - Final memory map same as ramimagezip ! Data Section Vector Table 0x 7-52

53 Summary Develop & debug with ramimagezip.bld
Must Open romzip.bld, to inherit proper include directories, etc. double-click ramimagezip.bld from within romzip.bld Once desired functionality reached, simply compile romzip.bld romzip.bin will be generated Download to flash Power cycle will invoke romzip to run from Flash After about 15 seconds, ramimagezip will be running From RAM Flash no longer used at this point Original ramimagezip memory map now in effect 7-53

54 Multi 2000 Configuration 7-54

55 Introduction MULTI-2000 is a user configurable IDE Users can control:
Compiler options Linker options Visual look and feel 7-55

56 Project | Options 7-56

57 General Tab Gives the user a location to add extra direction information, macro definitions, extra options to commands, etc. 7-57

58 Optimization Tab Selecting Optimize for Speed or Optimize for Size will bring up the Advanced button allowing the user to further customize optimization parameters 7-58

59 Run-time Error Tab Memory checking defaults to ‘None’. Other options are: Allocation – Checks for attempts to free non-allocated memory Memory – Checks for attempts to free previously free-ed memory 7-59

60 Configuration Tab Allows the user to specify environment specific information about the tools, file locations, etc. 7-60

61 Action Tab 7-61

62 Advanced Tab 7-62

63 Project | Language Options
Allows the user to specify C, C++, Ada, Pascal, and FORTRAN specific options 7-63

64 C Tab C versions include Kernighan & Ritchie, ANSI, Strict ANSI, and Transition Mode. 7-64

65 Project | CPU Options 7-65

66 ARM Options Select ARM7tm for the processor, and the appropriate choice of default, none, software, or FPA10. Other options include generating thumb code, code in big-endian format, and code linked for thumb libraries. 7-66

67 Project | Toolchain Options
The toolchain dialogs applies only to the tools you are using 7-67

68 Linker Tab The Linker tab gives the user the ability to control linker specific options, as well as how mapfiles will be generated. 7-68

69 Assembler Tab The Assembler tab allows the user to specify the assembler and listing file options. 7-69

70 Config | Options 7-70

71 General Tab The General tab gives the user a lot of control over MULTI-2000’s look and feel. Menu structures, window control, keyboard and mouse bindings can all be changed. 7-71

72 Debugger Tab The Debugger tab allows the users to control the performance and operation of the built in debugger. 7-72

73 Editor Tab The Editor tab allows the user to specify and control attributes of MULTI-2000’s built in editor. Users are also able to integrate their favorite editor, specifying it by name in the More Editor Options dialog. 7-73

74 Version Control Tab The Version Control tab allows the user to integrate their revision control system with the MULTI-2000 environment. Arguments are predefined for popular systems such as ClearCase™, and RCS, as well as Green Hills Software’s own MULTI Version Control, MVC. 7-74

75 Colors Tab The Color tab allows the user to control what colors are used for source code, build files, and within the debugger. Select a colored box to launch the color chooser. 7-75

76 Summary For further reading consult Building and Editing with Multi2000, Green Hills Software(M32W89NG) 7-76

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