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Computer system & Architecture Chapter 2 Computer Evolution and Performance
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Wilhelm Schickhard (1623) Astronomer and mathematician Automatically add, subtract, multiply, and divide Blaise Pascal (1642) Mathematician Mass produced first working machine (50 copies) Could only add and subtract Maintenance and labor problems Gottfried Liebniz (1673) Mathematician and inventor Improved on Pascal’s machine Add, subtract, multiply, and divide History of Computers Mechanical Era (1600s-1940s)
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Charles Babbage (1822) Mathematician, “Father of modern computer” Wanted more accuracy in calculations Difference engine Automatic computation of math tables Analytic engine Perform any math operation Punch cards Modern structure: I/O, storage, ALU Add in 1 second, multiply in 1 minute Both engines plagued by mechanical problems George Boole (1847) Mathematical analysis of logic Investigation of laws of thought History of Computers (cont’d) Mechanical Era (1600s-1940s)
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Herman Hollerith (1889) Modern day punched card machine Formed Tabulating Machine Company (became IBM) 1880 census took 5 years to tabulate Tabulation estimates were 1890: 7.5 years, 1900: 10+ years Hollerith’s tabulating machine reduced the 7.5 year estimate to 2 months Konrad Zuse (1938) Built first working mechanical computer, the Z1 Binary machine German government decided not to pursue development -- W.W.II already started History of Computers (cont’d) Mechanical Era (1600s-1940s)
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John Atanasoff (1937) 1 st Electronic Computer Binary Arithmetic Electronic Memory using capacitors Never fully operational Holds Patent on Electronic Digital Computer Howard Aiken (1943) Designed the Harvard Mark I Implementation of Babbage’s machine Built by IBM History of Computers (cont’d)
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Enigma -- WWII German Encryption System Used to encrypt messages sent to submarines COLOSSUS (1943) Top Secret British Code Breaker Alan Turing – Designed & Programmed Classified for 30 years after war 1 st Fully Functional Electronic Computer System History of Computers (cont’d)
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ENIAC - background Electronic Numerical Integrator And Computer Eckert and Mauchly University of Pennsylvania Trajectory tables for weapons Started 1943 Finished 1946 Too late for war effort Used until 1955
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ENIAC - details Decimal (not binary) 20 accumulators of 10 digits Programmed manually by switches 18,000 vacuum tubes 30 tons 15,000 square feet 140 kW power consumption 5,000 additions per second
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von Neumann/Turing Stored Program concept Main memory storing programs and data ALU operating on binary data Control unit interpreting instructions from memory and executing Input and output equipment operated by control unit Princeton Institute for Advanced Studies IAS Completed 1952
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Structure of von Nuemann Machine Main Memory Arithmetic and Logic Unit Program Control Unit Input Output Equipment
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IAS - details 1000 x 40 bit words Binary number 2 x 20 bit instructions Set of registers (storage in CPU) Memory Buffer Register Memory Address Register Instruction Register Instruction Buffer Register Program Counter Accumulator Multiplier Quotient
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Structure of IAS - detail Main Memory Arithmetic and Logic Unit Program Control Unit Input Output Equipment MBR Arithmetic & Logic Circuits MQAccumulator MAR Control Circuits IBR IR PC Address Instructions & Data Central Processing Unit
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Commercial Computers 1947 - Eckert-Mauchly Computer Corporation UNIVAC I (Universal Automatic Computer) US Bureau of Census 1950 calculations Became part of Sperry-Rand Corporation Late 1950s - UNIVAC II Faster More memory
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IBM Punched-card processing equipment 1953 - the 701 IBM’s first stored program computer Scientific calculations 1955 - the 702 Business applications Lead to 700/7000 series
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Transistors Replaced vacuum tubes Smaller Cheaper Less heat dissipation Solid State device Made from Silicon (Sand) Invented 1947 at Bell Labs William Shockley et al.
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Transistor Based Computers Second generation machines NCR & RCA produced small transistor machines IBM 7000 DEC - 1957 Produced PDP-1
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Microelectronics Literally - “small electronics” A computer is made up of gates, memory cells and interconnections These can be manufactured on a semiconductor e.g. silicon wafer
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Generations of Computer Vacuum tube - 1946-1957 Transistor - 1958-1964 Small scale integration - 1965 on Up to 100 devices on a chip Medium scale integration - to 1971 100-3,000 devices on a chip Large scale integration - 1971-1977 3,000 - 100,000 devices on a chip Very large scale integration - 1978 to date 100,000 - 100,000,000 devices on a chip Ultra large scale integration Over 100,000,000 devices on a chip
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Moore’s Law Increased density of components on chip Gordon Moore - cofounder of Intel Number of transistors on a chip will double every year Since 1970’s development has slowed a little Number of transistors doubles every 18 months Cost of a chip has remained almost unchanged Higher packing density means shorter electrical paths, giving higher performance Smaller size gives increased flexibility Reduced power and cooling requirements Fewer interconnections increases reliability
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Growth in CPU Transistor Count
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IBM 360 series 1964 Replaced (& not compatible with) 7000 series First planned “family” of computers Similar or identical instruction sets Similar or identical O/S Increasing speed Increasing number of I/O ports (i.e. more terminals) Increased memory size Increased cost Multiplexed switch structure
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DEC PDP-8 1964 First minicomputer (after miniskirt!) Did not need air conditioned room Small enough to sit on a lab bench $16,000 $100k+ for IBM 360 Embedded applications & OEM BUS STRUCTURE
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DEC - PDP-8 Bus Structure OMNIBUS Console Controller CPU Main Memory I/O Module I/O Module
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Semiconductor Memory 1970 Fairchild Size of a single core i.e. 1 bit of magnetic core storage Holds 256 bits Non-destructive read Much faster than core Capacity approximately doubles each year
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Intel 1971 - 4004 First microprocessor All CPU components on a single chip 4 bit Followed in 1972 by 8008 8 bit Both designed for specific applications 1974 - 8080 Intel’s first general purpose microprocessor
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Speeding it up Pipelining On board cache On board L1 & L2 cache Branch prediction Data flow analysis Speculative execution
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Performance Mismatch Processor speed increased Memory capacity increased Memory speed lags behind processor speed
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DRAM and Processor Characteristics
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Trends in DRAM use
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Memory Solutions Increase number of bits retrieved at one time Make DRAM “wider” rather than “deeper” Change DRAM interface Cache Reduce frequency of memory access More complex cache and cache on chip Increase interconnection bandwidth High speed buses Hierarchy of buses
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Internet Resources http://www.intel.com/ Search for the Intel Museum http://www.ibm.com http://www.dec.com Charles Babbage Institute PowerPC Intel Developer Home
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Questions
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