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Chapter1 Fundamental of Computer Design Dr. Bernard Chen Ph.D. University of Central Arkansas Fall 2010.

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Presentation on theme: "Chapter1 Fundamental of Computer Design Dr. Bernard Chen Ph.D. University of Central Arkansas Fall 2010."— Presentation transcript:

1 Chapter1 Fundamental of Computer Design Dr. Bernard Chen Ph.D. University of Central Arkansas Fall 2010

2 Outline Computer Science at a Crossroads Defining Computer Architecture Trend in Technology and Cost

3 Computer Science at a Crossroads Computer technology has made incredible progress in the roughly 60 years. A better personal computer (< $500) with faster processor, more main memory, and more storage can be bought than a super computer cost for 1M in 1985 However…

4 Computer Science at a Crossroads “Power wall” Triple hurdles of maximum power dissipation of air-cooled chips

5 Computer Science at a Crossroads “ILP wall” Little instruction-level parallelism left ot exploit efficiently

6 Computer Science at a Crossroads “Memory wall” Almost unchanged memory latency

7 Computer Science at a Crossroads Old Conventional Wisdom : Uniprocessor performance 2X / 1.5 yrs New Conventional Wisdom : Power Wall + ILP Wall + Memory Wall = Brick Wall Uniprocessor performance now 2X / 5(?) yrs

8 Computer Science at a Crossroads

9 Indeed, in 2004 INTEL canceled its high-performance uniprocessor projects and joined IBM and Sun in declaring that the road to higher performance would via multiple processors per chip rather than via faster uniprocessors “We are dedicating all of our future product development to multicore designs. … This is a sea change in computing” Paul Otellini, President, Intel (2004)

10 Computer Science at a Crossroads Difference is all microprocessor companies switch to multiprocessors (AMD, Intel, IBM, Sun; all new Apples 2 CPUs)  Biggest programming challenge: 1 to 2 CPUs This signals a historic switch from instruction-level parallelism (ILP) to thread-level parallelism (TLP) and data-level parallelism (DLP)

11 Problems with Sea Change Algorithms, Programming Languages, Compilers, Operating Systems, Architectures, Libraries, (EVERYTHING!!) … not ready to supply Thread Level Parallelism or Data Level Parallelism for CPUs

12 Problems with Sea Change Unlike Instruction Level Parallelism, cannot be solved by just by computer architects and compiler writers alone, but also cannot be solved without participation of computer architects The 4 th Edition of textbook Computer Architecture: A Quantitative Approach explores shift from Instruction Level Parallelism to Thread Level Parallelism / Data Level Parallelism

13 Outline Computer Science at a Crossroads Defining Computer Architecture Trend in Technology and Cost

14 Defining Computer Architecture The task of computer designer: Determine what attributes are important for a new computer, then design a computer to maximize performance while staying within cost, power, and availability constrains

15 Defining Computer Architecture This task has many aspects: Instruction set design Functional organization Logic design And implementation Also, Integrate circuit design Packaging Power Cooling AND Optimization, including a lot of technologies (complier, OS…)

16 Defining Computer Architecture In the past, the term computer architecture often referred only to instruction set design Other aspects of computer design were called implementation, often assuming that implementation is uninteresting or less challenging Of course, it is wrong for today’s trend

17 Defining Computer Architecture Architect’s job much more than instruction set design; technical hurdles today more challenging than those in instruction set design Since instruction set design not where action is, some conclude computer architecture (using old definition) is not where action is We disagree on conclusion Agree that ISA not where action is

18 Instruction Set Architecture (ISA) The instruction set architecture serves as the boundary between the software and hardware. We will have a complete introduction to this part. (Some examples in the next two slides)

19 Instruction code format Instruction code format with two parts : Op. Code + Address Op. Code : specify 16 possible operations(4 bits) Address : specify the address of an operand(12 bits) If an operation in an instruction code does not need an operand from memory, the rest of the bits in the instruction(address field) can be used for other purpose Op. Code Address 15 12 11 0 instruction data 15 12 11 0 Not an instruction

20 Components of Instructions Operations (opcodes) Number of operands (Number of data locations) opcode:add value in src1 to value in src2 and place the result in dst. ADD R1, R2, R3 R1  R2 + R3 Instruction encodings add r1,r2,r3 src2dstopcodesrc1

21 Outline Computer Science at a Crossroads Defining Computer Architecture Trend in Technology and Cost

22 Trends in Technology To evaluate a computer, designer must be aware of rapid changes in implementation technology Integrated circuit logic: transistor density increase by about 35% per year Increase in die size is ranging from 10% to 20% per year The combined effect is a growth rate in transistor count on a chip is about 40%~55% per year

23 Trends in Technology DRAM (dynamic random-access memory): Capacity increases by about 40% per year, doubling roughly every two years Magnetic disk technology Before 1990: 30% per year, doubling in 3 years 1996~2004: from 60% to 100% increase per year After 2004: drop back to 30% per year Despite this roller coaster of rates of improvement, it is still 50-100 times cheaper than DRAM

24 Trends in Technology

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26 Intel Pentium4 and Pentium M price over time

27 The most recent introductions will continue to decrease until they reach similar price to the lowest-cost parts available in 2005 ($200) Such price decreases assume a competitive environment (Data Courtesy of Microprocessor Report, May 2005)

28 Cost of an Integrated Circuit Cost of integrated circuit= Cost of die + Cost of testing die + Cost of packaging and final test Final test yield In this section, we focus on cost of dies

29 Cost of an Integrated Circuit Cost of die = Cost of wafer / (Dies per wafer * Die yield) Learning how to predict the number of good chips per wafer requires first learning how many dies fit on a wafer

30 Cost of an Integrated Circuit This 300 mm wafer contains 117 AMD chips

31 Cost of an Integrated Circuit

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