1. CMOS Analog Design Using All-Region MOSFET Modeling 1 Chapter 1 Introduction to analog CMOS design

2. CMOS Analog Design Using All-Region MOSFET Modeling 2 Important differences between BJTs and MOSFETs A)BJTs are three-terminal devices and MOSFETs are four-terminal devices B) Differences in the internal symmetries of the most commonly used BJTs and MOSFETs C) BJT exponential current law vs. MOS current law D) The geometric degrees of freedom for MOSFETs in analog design E) Quality of BJT and MOSFET models

3. CMOS Analog Design Using All-Region MOSFET Modeling 3 Ebers-Moll equivalent circuit of an npn transistor E B RIRRIR FIFFIF IFIF IRIR IEIE ICIC IBIB C DEDE DCDC Forward and reverse currents

4. CMOS Analog Design Using All-Region MOSFET Modeling 4 The capacitive model of the MOS structure ss V GB p- type neutral region depletion region ss V GB

5. CMOS Analog Design Using All-Region MOSFET Modeling 5 MOSFET: symmetric strong and weak inversion models strong inversion weak inversion V DB p-type substrate n+n+ n+n+ V SB V GB IDID

6. CMOS Analog Design Using All-Region MOSFET Modeling 6 Intrinsic gain stages: common-source and common-emitter amplifiers

7. CMOS Analog Design Using All-Region MOSFET Modeling 7 Small-signal circuit and frequency response of the CS and CE amplifiers

8. CMOS Analog Design Using All-Region MOSFET Modeling 8 Design of the CE and CS amplifiers BJT MOSFET

9. CMOS Analog Design Using All-Region MOSFET Modeling 9 Example: GB = 10 MHz, C L = 10 pF = 80·10 -6 A/V 2, n = 1.35 1 Strong inversion model. 2 Accurate all- region MOSFET model W/L I Dsi (  A) 1 I D (  A) 2  0 22 5006.6 28.6 10033.2 55.2 5066.4 88.4 10332 354

10. CMOS Analog Design Using All-Region MOSFET Modeling 10 All-region “empirical” model of the MOSFET

11. CMOS Analog Design Using All-Region MOSFET Modeling 11 Aspect ratio vs. current excess in a MOSFET design

12. CMOS Analog Design Using All-Region MOSFET Modeling 12 Consistent modeling of MOSFETs and the series association

13. CMOS Analog Design Using All-Region MOSFET Modeling 13 Series-parallel association of MOSFETs

14. CMOS Analog Design Using All-Region MOSFET Modeling 14 Series association of MOSFETs vs. long-channel MOSFETs Series association Long-channel Nominal V T L-dependent V T Characterize one transistor ( performance of the shortest transistor is “optimized”) L-dependent characterization (halo/pocket implants effects) “Accurate” for current mirrors L-dependent accuracy Gate current more predictable Extrinsic capacitors at intermediate nodes

15. CMOS Analog Design Using All-Region MOSFET Modeling 15 Application of series parallel associations of MOSFETs - M:1 current mirrors N M IOIO M : 1 N N I in IOIO M : 1 M I in IOIO  M : 1/  M MM MM

16. CMOS Analog Design Using All-Region MOSFET Modeling 16 Current mismatch of two M:1 current mirrors Arnaud, JSSC Sep. 06 I in IOIO 100 : 1 100 N IOIO 100 : 1 10 I in 10

17. CMOS Analog Design Using All-Region MOSFET Modeling 17 M-2M Digital-to-Analog converter (1): A set of 4 transistors can be used as substitute for Mbb VGVG I D1 I D2 IDID I D2a I D2b I D1 MaMa M bb M ba M bd M bc MdMd McMc

18. CMOS Analog Design Using All-Region MOSFET Modeling 18 M-2M Digital-to-Analog converter (2): 8 bit DAC with M-2M ladder Q0Q0 Q6Q6 Do DQ ck Q1Q1 DQ Q7Q7 DQ Di Ck DQ ck

19. CMOS Analog Design Using All-Region MOSFET Modeling 19 M-2M Digital-to-Analog converter (3): Model of the normalized current mismatch for a 10 μm x 10 μm transistor

20. CMOS Analog Design Using All-Region MOSFET Modeling 20 M-2M Digital-to-Analog converter (4):

21. CMOS Analog Design Using All-Region MOSFET Modeling 21 Top area is the M-2M ladder and the bottom area is the serial register. Klimach, ISCAS 08 M-2M Digital-to-Analog converter (5):

22. CMOS Analog Design Using All-Region MOSFET Modeling 22 Similar approaches to CMOS design Paul G. A. Jespers; The gm/ID Design Methodology for CMOS Analog Low Power Integrated CircuitsThe gm/ID Design Methodology for CMOS Analog Low Power Integrated Circuits 2009, ISBN: 978-0-387-47100-6 D. M. Binkley; Tradeoffs and Optimization in Analog CMOS Design ISBN: 978-0-470-03136-0, Wiley 2008.Tradeoffs and Optimization in Analog CMOS Design Danica Stefanovic and Maher Kayal; Structured Analog CMOS Design Series: Analog Circuits and Signal Processing 2009, ISBN: 978-1-4020-8572-7