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The Goal Redesign Microprocessor Labs For New Chip Redesign Microprocessor Labs For New Chip Continuation of work started by Miguel Morales last year Continuation.

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Presentation on theme: "The Goal Redesign Microprocessor Labs For New Chip Redesign Microprocessor Labs For New Chip Continuation of work started by Miguel Morales last year Continuation."— Presentation transcript:

1 The Goal Redesign Microprocessor Labs For New Chip Redesign Microprocessor Labs For New Chip Continuation of work started by Miguel Morales last year Continuation of work started by Miguel Morales last year 7 Total labs that were written for a Freescale MC6800HC12 microcontroller needed to be converted to a Texas Instruments MSP430 series microcontroller 7 Total labs that were written for a Freescale MC6800HC12 microcontroller needed to be converted to a Texas Instruments MSP430 series microcontroller Oversee a group of test students who will complete the labs as part of their microcontroller coursework Oversee a group of test students who will complete the labs as part of their microcontroller coursework

2 Why Change? Reduced Cost Reduced Cost Freescale based AXIOM board 6800 series: $80 Freescale based AXIOM board 6800 series: $80 Texas Instruments MSP430: $20 Texas Instruments MSP430: $20 Interface Options Interface Options Freescale based AXIOM board uses obsolete RS232 PC interface Freescale based AXIOM board uses obsolete RS232 PC interface Texas Instruments uses ubiquitous USB interface Texas Instruments uses ubiquitous USB interface Ease of Learning Ease of Learning Freescale based AXIOM board uses a difficult text based development tool and complex instruction set Freescale based AXIOM board uses a difficult text based development tool and complex instruction set Texas Instruments uses simple windows interface and reduced instruction set Texas Instruments uses simple windows interface and reduced instruction set

3 The Hardware Freescale Based Development BoardTexas Instruments MSP430 Board

4 The Next Step Design something using what we learned Design something using what we learned Leverage the benefits of the TI MSP430 Leverage the benefits of the TI MSP430 Low Cost Low Cost Low Power Low Power Easy Development Easy Development Apply the technology from our labs to build something useful Apply the technology from our labs to build something useful Digital Input / Output Digital Input / Output Edge Detection Edge Detection Timing and Counters Timing and Counters

5 What Is WWVB Radio station broadcasting official government time Radio station broadcasting official government time Broadcast antenna located north of Fort Collins Colorado (Figure 1) Broadcast antenna located north of Fort Collins Colorado (Figure 1) 60kHz Carrier Wave 60kHz Carrier Wave 50kW Total Transmit Power 50kW Total Transmit Power Set to the NIST-F1 atomic clock in Boulder Set to the NIST-F1 atomic clock in Boulder Accurate to 1 second over 60 million years Accurate to 1 second over 60 million years Error rate less then 0.1 nanoseconds / day Error rate less then 0.1 nanoseconds / day

6 WWVB Broadcast Antenna (Figure 1)

7 Receiver First Stage Receiver Comprised of antenna and 4 stage amplifier (Figure 2) Receiver Comprised of antenna and 4 stage amplifier (Figure 2) Signal Reception Signal Reception The 60kHz carrier wave is picked up using a loopstick antenna (Figure 3) The 60kHz carrier wave is picked up using a loopstick antenna (Figure 3) Ferrite Core Inductor in parallel with a capacitor Ferrite Core Inductor in parallel with a capacitor Received signal strength is too small to measure Received signal strength is too small to measure First Stage Amplifier First Stage Amplifier Uses a JFET (High Input Impedance) LF351 Operational Amplifier Uses a JFET (High Input Impedance) LF351 Operational Amplifier First stage output strength roughly 2mVpp First stage output strength roughly 2mVpp

8 Receiver Schematic (Figure 2)

9 Receiver Second and Third Stage Second amplifier stage is also a LF351 OP-AMP Second amplifier stage is also a LF351 OP-AMP Second stage output strength approximately 10mVpp Second stage output strength approximately 10mVpp Third stage uses a high gain LM741 OP-AMP Third stage uses a high gain LM741 OP-AMP Adjustable zero point to help reduce signal noise Adjustable zero point to help reduce signal noise Output peak voltage at this stage must be enough to turn on the rectifier diode and charge the capacitor ~0.5V Output peak voltage at this stage must be enough to turn on the rectifier diode and charge the capacitor ~0.5V Output strength approximately 2Vpp Output strength approximately 2Vpp

10 Received Signal (Figure 3) Rectified Signal (Figure 4)

11 Rectification and Output The signal is rectified using a germanium diode and a 5.1uF capacitor (Figure 4) The signal is rectified using a germanium diode and a 5.1uF capacitor (Figure 4) Germanium diodes provide a lower voltage drop then a silicon ~0.3V vs. ~0.7V Germanium diodes provide a lower voltage drop then a silicon ~0.3V vs. ~0.7V A large capacitor is used to provide a clean high voltage level A large capacitor is used to provide a clean high voltage level A fourth amplification stage is used to drive signal output (Figure 5) A fourth amplification stage is used to drive signal output (Figure 5) Zener diode in line with output stage helps reduce ripple in the output signal Zener diode in line with output stage helps reduce ripple in the output signal

12 Digital Signal Output (Figure 5)

13 Each bit is one second in length and stays low for a percentage of time based on the type of bit Each bit is one second in length and stays low for a percentage of time based on the type of bit The low times for each bit type are: The low times for each bit type are: 0 = 20% = 200ms 0 = 20% = 200ms 1 = 50% = 500ms 1 = 50% = 500ms Marker = 80% = 800ms Marker = 80% = 800ms Each new minute begins with two consecutive marker bits. Each new minute begins with two consecutive marker bits.

14 MSP430 Decoder and Clock Clock functions Clock functions The MSP430 uses a 16MHz clock with its timer system to create an 8ms count. This count is used to measure one second (125 counts) The MSP430 uses a 16MHz clock with its timer system to create an 8ms count. This count is used to measure one second (125 counts) Each second the display time is updated Each second the display time is updated Decoding Decoding Interrupts are used to detect rising and falling edges Interrupts are used to detect rising and falling edges Time between falling and rising is measured to determine the bit type Time between falling and rising is measured to determine the bit type Time is updated after a full minute signal has been received without any errors Time is updated after a full minute signal has been received without any errors

15 Liquid Crystal Display 4 lines, 20 characters each 4 lines, 20 characters each Uses on-board controller (Hitachi HD44780) Uses on-board controller (Hitachi HD44780) Controller must be initialized by the MSP430 Controller must be initialized by the MSP430 Can be run in 8 or 4 bit access mode Can be run in 8 or 4 bit access mode Our design uses 4 bit access to conserve I/O pins on the MSP430 Our design uses 4 bit access to conserve I/O pins on the MSP430 Also has control pins which must be manipulated when interacting with the display Also has control pins which must be manipulated when interacting with the display

16 Clock & Display Schematic


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