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The Use of Microcontrollers

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1 The Use of Microcontrollers
Using ATMEL’s ATmega168 as an example

2 Programming a Microcontroller What’s Needed?
$7.50 $34.00 Computer Software Write Code Simulate AVR Studio 4 Port Serial Parallel USB Programmer Development Board JTAG/ICE ISP Bit-Bang ADAFruit AVRISP Mk II Microcontroller Connection DIP SOIC QFN Capability ADC/DAC PWM USB

3 Why Atmel’s AVR Microcontroller?
RISC architecture with mostly fixed-length instruction, load-store memory access, and 32 general-purpose registers. A two-stage instruction pipeline that speeds up execution. Majority of instructions take one clock cycle Up to 20-MHz clock operation Wide variety of on-chip peripherals, including digital I/O, ADC, EEPROM, Timer, UART, RTC timer, pulse width modulator (PWM), etc Internal program and data memory In-system programmable Available in 8-pin to 64-pin package size to suit wide variety of applications Up to 12 times performance speedup over conventional CISC controllers. Wide operating voltage from 2.7 V to 6.0 V. A simple architecture offers a small learning curve to the uninitated.

4 Scalability

5 ATtiny25 Block Diagram

6 ATtiny2313 Block Diagram

7 ATmega168 Block diagram

8 ATmega16 Block diagram

9 Different Types of AVR Controllers

10 ATmega168 Pins PDIP PC5 PC4 PC3 PC2 PC1 PC0 GND AREF AVCC PB5 PB4 PB3
7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 (ADC5/SCL/PCINT13) (ADC4/SDA/PCINT12) (ADC3/PCINT11) (ADC2/PCINT10) (ADC1/PCINT9) (ADC0/PCINT8) (SCK/PCINT5) (MISO/PCINT4) (MOSI/OC2A/PCINT3) (OC1A/PCINT1) (PCINT16/RXT) (PCINT17/TXD) (PCINT18/INT0) (PCINT19/OC2B/INT1) (PCINT20/XCK/T0) (PCINT6/XTAL1/TOSC1) (PCINT7/XTAL2/TOSC2) (PCINT21/OC0B/T1) (PCINT23/AIN1) PCINT0/CLK0/ICP1) (PCINT22/OC0A/AIN0)

11 Memory Flash Code Memory Data Memory EEPROM Memory
16-bit words starting at 0x0000 Size dependent on AVR microcontroller Non-volatile Read-only memory (writing is external to code) Data Memory General Purpose Registers 32 8-bit registers I/O Registers Two 8-bit registers for each I/O line SRAM 8-bit memory with size dependent on AVR microcontroller EEPROM Memory Typically reserved for variables that must retain their value in the event of a shutdown (e.g., system calibration data unique to each board) Slow speed writing (1 millisecond for 1 byte of memory) Limited number of write cycles

12 AVR Risk Architecture The Register File 32 8-bit registers

13 I/O Memory Registers SREG: Status Register SP: Stack Pointer Register
GIMSK: General Interrupt Mask Register GIFR: General Interrupt Flag Register MCUCR: MCU General Control Register MCUSR: MCU Status Register TCNTO: Timer/Counter 0 Register TCCR0A: Timer/Counter 0 Control Register A TCCR0B: Timer/Counter 0 Control Register B OCR0A: Timer/Counter 0 Output Compare Register A OCR0B: Timer/Counter 0 Output Compare Register B TIMSK0: Timer/Counter 0 Interrupt Mask Register TIFR0: Timer/Counter 0 Interrupt Flag Register EEAR: EEPROM Address Register EEDR: EEPROM Data Register EECR: EEPROM Control Register PORTB: PortB Data Register DDRB: PortB Data Direction Register PINB: Input Pins on PortB PORTD: PortD Data Register DDRD: PortD Data Direction Register PIND: Input Pins on PortD SPI I/O Data Register SPI Status Register SPI Control Register UART I/O Data Register UART Status Register UART Control Register UART Baud Rate Register ACSR: Analog Comparator Control and Status Register

14 Port Registers Similar for Ports C and D. PORTB: PortB Data Register
Bit 7 6 5 4 3 2 1 DDRB: PortB Data Direction Register Bit 7 6 5 4 3 2 1 PINB: Input Pins on PortB Bit 7 6 5 4 3 2 1 Similar for Ports C and D.

15 Parallel I/O Ports Most general-purpose I/O devices
Each I/O Port has 3 associated registers DDRx (where “x” is A, B, C…) Data Direction Register Port x Determines which bits of the port are input and which are output DDRB = 0x02; /* sets the second lowest of port B to output” */ PORTx Port Driver Register PORTB = 0x02; /* sets the second bit of port B and clears the others */ PINx Port Pins Registers Returns the status of all 8 port B pins. unsigned int x; x = PINB; /* Places the status of port B into variable x */

16 Input/Output Ports All ports initially set to input
Must declare all output pins using DDRx (Data Direction Registry Port x) The default for input port pins is floating. Can supply a pull-up resistor by writing logic 1 to the corresponding bit of the port driver register DDRA = 0xC0; /* upper 2 bits are output, lower 6 bits are input*/ PORTA = 0x03; /enable internal pull-ups on lowest 2 bits*/ Port pins in output mode are typically capable of sinking 20 mA, but source much less.

17 Bytes Decimal Binary Hexadecimal 0000 0x0 1 0001 0x1 2 0010 0x2 3 0011
0000 0x0 1 0001 0x1 2 0010 0x2 3 0011 0x3 4 0100 0x4 5 0101 0x5 6 0110 0x6 7 0111 0x7 8 1000 0x8 9 1001 0x9 10 1010 0xA 11 1011 0xB 12 1100 0xC 13 1101 0xD 14 1110 0xE 15 1111 0xF

18 Output Port Sink vs Source
When does the LED light for the Sink? Source? Which gives the brighter light? Sink Source 5V PORTBx set to 0 PORTBx set to 1

19 To Drive an LED #include <avr/io.h> #include <avr/delay.h>
int main(void) { DDRB = (1<<DDRB4); PORTB = (1<<PORTB4); while(1) _delay_ms( 3000); PORTB = 0b ; PORTB = 0b ; } VCC VCC VCC (PCINT4/XTAL2) PB4 GND Is LED on when PB4 is zero or one? *To find definitions like PORTB4, open the m168def.inc file under C:\Program Files\Atmel\AVR Tools\AvrAssembler\Appnotes

20 m168def.inc *C:\Program Files\Atmel\AVR Tools\AvrAssembler\Appnotes
;***** SPECIFY DEVICE ****************************************************** .device ATmega168 ;***** MEMORY MAPPED I/O REGISTER DEFINITIONS (&FF-$60) ******************** .equ TCNT1H =$85 .equ TCNT1L =$84 .equ TCCR1C =$82 .equ TCCR1B =$81 .equ TCCR1A =$80 .equ DIDR =$7F .equ DIDR =$7E .equ TIMSK1 =$6F .equ TIMSK0 =$6E .equ PCMSK2 =$6D .equ PCMSK1 =$6C .equ PCMSK0 =$6B ;***** I/O REGISTER DEFINITIONS ($3F-$00) ********************************** .equ SREG =$3F .equ SPH =$3E .equ SPL =$3D .equ SPCR =$2c .equ GPIOR2 =$2B .equ GPIOR1 =$2A .equ OCR0B =$28 .equ OCR0A =$27 .equ TCNT =$26 .equ TCCR0B =$25 .equ TCCR0A =$24 .equ PORTD =$0B .equ DDRD =$0A .equ PIND =$09 .equ PORTC =$08 .equ DDRC =$07 .equ PINC =$06 .equ PORTB =$05 .equ DDRB =$04 .equ PINB =$03 ;***************************************************************************** ; Bit Definitions ; - Port B - .equ PORTB7 = 7 ; PORTB .equ PORTB6 = 6 .equ PORTB5 = 5 .equ PORTB4 = 4 .equ PORTB3 = 3 .equ PORTB2 = 2 .equ PORTB1 = 1 .equ PORTB0 = 0 .equ DDB = 7 ; DDRB .equ DDB = 6 .equ DDB = 5 .equ DDB = 4 .equ DDB = 3 .equ DDB = 2 .equ DDB = 1 .equ DDB = 0 .equ PINB = 7 ; PINB .equ PINB = 6 .equ PINB = 5 .equ PINB = 4 .equ PINB = 3 .equ PINB = 2 .equ PINB = 1 .equ PINB = 0 ;**********TIMER_COUNTER_0************ ;TCCR0A: .equ COM0A1 =7 .equ COM0A0 =6 .equ COM0B1 =5 .equ COM0B0 =4 .equ WGM =1 .equ WGM =0 *C:\Program Files\Atmel\AVR Tools\AvrAssembler\Appnotes

21 Limited Agenda for Microprocessor
External Interrupts INT (Not covered) PCINT (24 different interrupts) Internal Interrupts Timers / Counters (8-bit) Timer (sec) Pulse Width Modulation Setup of Software / Hardware Tools

22 Interrupts Interrupts vs Polling
Interrupts may lead to serious problems Disable interrupts before reading variables External Interrupts External Interrupt Request (INT0) Pin Change Interrupt (PCINT0) Internal Interrupts

23 Key Registers: PCINT external interrupts
PCMSK# (were # is either 0, 1 or 2) PCICR SREG Bit 7 6 5 4 3 2 1 PCMSK2 PCINT 23 PCINT22 PCINT21 PCINT20 PCINT19 PCINT18 PCINT17 PCINT16 PCMSK1 - PCINT14 PCINT13 PCINT12 PCINT11 PCINT10 PCINT9 PCINT8 PCMSK0 PCINT7 PCINT6 PCINT5 PCINT4 PCINT3 PCINT2 PCINT1 PCINT0 Bit 7 6 5 4 3 2 1 0x68 - PCIE2 PCIE1 PCIE0 Bit 7 6 5 4 3 2 1 0x3f I T H S V N Z C

24 ATmega168 Pins PDIP PC5 PC4 PC3 PC2 PC1 PC0 GND AREF AVCC PB5 PB4 PB3
7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 (PCINT13) (PCINT12) (PCINT11) (PCINT10) (PCINT9) (PCINT8) (PCINT5) (PCINT4) (PCINT3) (PCINT1) (PCINT16) (PCINT17) (PCINT18) (PCINT19) (PCINT20) (PCINT6) (PCINT7) (PCINT21) (PCINT23) (PCINT0) (PCINT22)

25 1. PCMSK# – Pin Change Mask Register #
Bit 7 6 5 4 3 2 1 PCMSK2 PCINT 23 PCINT22 PCINT21 PCINT20 PCINT19 PCINT18 PCINT17 PCINT16 PCMSK1 - PCINT14 PCINT13 PCINT12 PCINT11 PCINT10 PCINT9 PCINT8 PCMSK0 PCINT7 PCINT6 PCINT5 PCINT4 PCINT3 PCINT2 PCINT1 PCINT0 Read/Write R/W Initial Value Bit 7 – 0: Pin Change Enable Mask Each PCINT# bit selects whether pin change interrupt is enabled on the corresponding I/O pin. If PCINT# is cleared, the pin change interrupt on the corresponding I/O pin is disabled. If you decided to test for a change on Pin 2, the first thing to do is check the Pin Layout to determine what PCINT# corresponds to that pin – PCINT16 in this case. Checking the list of registers above, note that PCINT16 falls on the PCMSK2 register. Enabling a Pin Change interrupt on Pin 2 would consist of: PCMSK2 = 1<<PCINT16 ;

26 2. PCICR – Pin Change Interrupt Control Register
Bit 7 6 5 4 3 2 1 0x68 - PCIE2 PCIE1 PCIE0 Read/Write R R/W Initial Value Bit # – PCIE#: Pin Change Interrupt Enable # where (# is 2, 1, or 0) Whet the PCIE# bit is set (one) and the I-bit in the Status Register (SEG) is set (one), pin change interrupt # is enabled. Any change on any enabled pin will cause an interrupt. The corresponding interrupt on Pin Change Interrupt Request is executed from the PCI1 interrupt Vector. PCIE2 enables PCINT pins and are enabled individually by the PCMSK2 register PCIE1 enables PCINT pins and are enabled individually by the PCMSK1 register PCIE0 enables PCINT pins and are enabled individually by the PCMSK0 register Since you just set register PCMSK2, you now have to enable that register by setting PCIE2 to 1. PCICR = 1<<PCIE2;

27 3. SREG – AVR Status Register
Bit 7 6 5 4 3 2 1 0x3f I T H S V N Z C Read/Write R/W Initial Value Bit 7 – I: Global Interrupt Enable The Global Interrupt Enable bit must be set for the interrupts to be enabled. The individual interrupt enable control is then performed in separate control registers. If the Global Interrupt Enable Register is cleared, none of the interrupts are enabled independent of the individual interrupt enable settings. Finally, you must set the I bit in SREG enabling internal and external interrupts that have been set to operate. To stop all interrupts, just set SREG_I to 0. SREG = 1<<SREG_I ;

28 Enabling External Interrupts
The following code enables interrupts on the PCINT16 pin (e.g., pin 2) SREG = 1<<SREG_I ; PCICR = 1<<PCIE2; PCMSK2 = 1<<PCINT16 ; What do you want to happen after an interrupt is detected?

29 In AVR Studio, select Help -> avr-libc Reference Manual

30 Defining an Interrupt Routines
Vector name Description Applicable for device PCINT0_vect Pin Change Interrupt Request 0 ATmega162, ATmega165, ATmega165P, ATmega168P, ATmega169, ATmega169P, ATmega325, ATmega3250, ATmega3250P, ATmega328P, ATmega329, ATmega3290, ATmega3290P, ATmega32HVB, ATmega406, ATmega48P, ATmega645, ATmega6450, ATmega649, ATmega6490, ATmega88P, ATmega168, ATmega48, ATmega88, ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega324P, ATmega164P, ATmega644P, ATmega644, ATtiny13, ATtiny43U, ATtiny48, ATtiny24, ATtiny44, ATtiny84, ATtiny45, ATtiny25, ATtiny85, AT90USB162, AT90USB82, AT90USB1287, AT90USB1286, AT90USB647, AT90USB646 PCINT1_vect Pin Change Interrupt Request 1 ATmega162, ATmega165, ATmega165P, ATmega168P, ATmega169, ATmega169P, ATmega325, ATmega3250, ATmega3250P, ATmega328P, ATmega329, ATmega3290, ATmega3290P, ATmega32HVB, ATmega406, ATmega48P, ATmega645, ATmega6450, ATmega649, ATmega6490, ATmega88P, ATmega168, ATmega48, ATmega88, ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega324P, ATmega164P, ATmega644P, ATmega644, ATtiny43U, ATtiny48, ATtiny24, ATtiny44, ATtiny84, AT90USB162, AT90USB82 PCINT2_vect Pin Change Interrupt Request 2 ATmega3250, ATmega3250P, ATmega328P, ATmega3290, ATmega3290P, ATmega48P, ATmega6450, ATmega6490, ATmega88P, ATmega168, ATmega48, ATmega88, ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega324P, ATmega164P, ATmega644P, ATmega644, ATtiny48 ISR(PCINT2_vect) { ... // Code to handle the event. } Note that this routine is called whenever pins PCINT have logical changes. How do you determine which pin actually changed? (Harder than you would think!)

31 Example of External Interrupt
#include <avr/io.h> #include <avr/interrupt.h> ISR( PCINT2_vect ) /* Code to execute when external interrupt on PCINT is triggered by a logic change*/ { PORTB = PORTB ^ 0x02; } int main(void) // Setup for External Interrupt PCINT16 (uses pin 2 or PD0) SREG = ( 1<<SREG_I ); // Enables global interrupts PCICR = ( 1<<PCIE2 ); // Enables vector interrupts on PCINT PCMSK2 = ( 1<<PCINT16 ); // Enables individual interrupt PCINT16 only DDRB = 1 << PORTB1; while(1) ;

32 Internal Interrupts

33 Timers/Counter Most commonly used complex peripherals
Think of them as binary up-counters In timing mode, count time periods In counting mode, counting events or pulses 8-bit and 16-bit Timers available ATmega168 Timer/Counter 0 8-bit Timer/Counter with Prescaler Two PWM Channels Timer/Counter 1 16-bit High Speed Timer/Counter with Separate Prescaler 2 High Frequency PWM Outputs Timer/Counter 2

34 Trips Timer/Counter Overflow Flag
Normal Mode High Frequency Single Slope Counter Counts only from Bottom to Top Timer/Counter Register n (TCNTn) Top (0xFF) Bottom (0x00) Trips Timer/Counter Overflow Flag

35 Key Registers to enable Timer
TCCR0A – Timer/Counter0 Control Register A TCCR0B – Timer/Counter0 Control Register B TIMSK0 – Timer/Counter Interrupt Mask Register TIFR0 – Timer/Counter Interrupt Flag Register Bit 7 6 5 4 3 2 1 0x24 COM0A1 COM0A0 COM0B1 COM0B0 - WGM01 WGM00 Bit 7 6 5 4 3 2 1 0x25 FOC0A FOC0B - WGM02 CS02 CS01 CS00 Bit 7 6 5 4 3 2 1 0x25 FOC0A FOC0B - WGM02 CS02 CS01 CS00 Bit 7 6 5 4 3 2 1 0x25 - OCF0B OCF0A TOV0

36 Timer/Counter Mode of Operation
1. TCCR0A Register Bit 7 6 5 4 3 2 1 0x24 COM0A1 COM0A0 COM0B1 COM0B0 - WGM01 WGM00 Bit 1-0 : Waveform Generation Mode Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting sequence of the counter, the source of the maximum (TOP) counter value, and what type of waveform generation to be used. Mode WGM02 WGM01 WGM00 Timer/Counter Mode of Operation TOP Update of OCRx at TOV Flag Set on(1)(2) Normal 0xFF Immediate MAX 1 PWM, Phase Correct BOTTOM 2 CTC OCRA 3 Fast PWM 5 7 Set for Normal Mode (Note we still have to set WGM02 in the TCCR0B Register.) TCCR0A = (0<<WGM00);

37 Timer/Counter Mode of Operation
2. TCCR0B Register Bit 7 6 5 4 3 2 1 0x25 FOC0A FOC0B - WGM02 CS02 CS01 CS00 Bit 3 : Waveform Generation Mode Use table from previous slide Mode WGM02 WGM01 WGM00 Timer/Counter Mode of Operation TOP Update of OCRx at TOV Flag Set on(1)(2) Normal 0xFF Immediate MAX 1 PWM, Phase Correct BOTTOM 2 CTC OCRA 3 Fast PWM 5 7 Setting for Phase Correct PWM TCCR0B = (0<<WGM02);

38 2. TCCR0B Register (Continued)
Bit 7 6 5 4 3 2 1 0x25 FOC0A FOC0B - WGM02 CS02 CS01 CS00 Bit 2:0 : Clock Select These bits select the clock source to be used by the Timer/Counter CS02 CS01 CS00 Description No clock source (Timer/Counter stopped) 1 clkI/O/(No prescaling) clkI/O/8 (From prescaler) clkI/O/64 (From prescaler) clkI/O/256 (From prescaler) clkI/O/1024 (From prescaler) External clock source on T0 pin. Clock on falling edge. External clock source on T0 pin. Clock on rising edge. Depends on the Frequency needed. We’ll choose no prescaler. TCCR0B = (0<<WGM02) | (1<<CS00);

39 3. TIMSK0 Register TIMSK0= (1<<TOIE0); Bit 7 6 5 4 3 2 1 0x25 -
0x25 - OCIE0B OCIE0A TOIE0 Bit 0 - TOIE0: Timer/Counter0 Overflow Interrupt Enable When the TOIE0 bit is written to one, and the I-bit in the Status Register is set, the Timer/Counter0 Overflow interrupt is enabled. The corresponding interrupt is executed if an overflow in Timer/Counter0 occurs, i.e., when the TOV0 bit is set in the Timer/Counter 0 Interrupt Flag Register – TIFR0. Enabling Timer/Counter Overflow Interrupt TIMSK0= (1<<TOIE0);

40 4. TIFR0 Register TIFR0 = (1<<TOV0); Bit 7 6 5 4 3 2 1 0x25 -
0x25 - OCF0B OCF0A TOV0 Bit 0 - TOV0: Timer/Counter0 Overflow Flag The bit TOV0 is set when an overflow occurs in Timer/Counter0. TOV0 is cleared by hardware when executing the corresponding interrupt handling vector. Alternatively, TOV0 is cleared by writing a logic one to the flag. When the SREG I-bit, TOIE0, and TOV0 are set, the Timer/Counter0 Overflow interrupt is executed. (The setting of this flag is dependent on the WGM02:0 bit settings. Refer to the previous table) Clear the Timer/Counter Overflow flag (e.g., initiate the overflow counter) TIFR0 = (1<<TOV0);

41 Internal Interrupt Timer/Counter0 Overflow
Select avr-libc Reference Manual Choose Library Reference Identify Module to include in code Click on Module

42 Internal Interrupt (Continued)
Find Correct Interrupt Vector ISR ( ?_vect) { //place code to be executed on this interrupt } Write Code to be executed upon the interrupt

43 PWM Modes Fast PWM Mode High Frequency Single Slope
Counter Counts only from Bottom to Top Suited for power regulation, rectification, and DAC application 1 2 3 4 5 6 7 Timer/Counter Register n (TCNTn) Top (0xFF) Bottom (0x00) OCROx Value Period 1 2 3 TCNTn Period Top (0xFF) Bottom (0x00) OCROx Value Phase Correct PWM Mode Lower Frequency Dual Slope Counter Counts up the down Suited for motor control applications

44 Phase Correct PWM Timer/Counter 0 (8-bit)
Set Frequency Prescaler Determine Bit Resolution Set Duty Cycle Determined by OCR0x

45 ATmega168 Pins PDIP PC5 PC4 PC3 PC2 PC1 PC0 GND AREF AVCC PB5 PB4 PB3
7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 (OC2A) (OC1A) (OC2B) (OC0B) (OC0A) (OC1B)

46 Key Registers to enable Phase Correct PWM
TCCR0A – Timer/Counter0 Control Register A TCCR0B – Timer/Counter0 Control Register B OCR0x – Output Compare Register x An 8-bit Register where x stands for either A or B. e.g., Timer 0 has Output on PD6 (Pin 12) for OC0A and PD5 (Pin 11) for OC0B We’ll use A for our example. Bit 7 6 5 4 3 2 1 0x24 COM0A1 COM0A0 COM0B1 COM0B0 - WGM01 WGM00 Bit 7 6 5 4 3 2 1 0x25 FOC0A FOC0B - WGM02 CS02 CS01 CS00

47 1. TCCR0A Register We’ll set COMOA to 3. TCCR0A = (3<<COMOA0);
Bit 7 6 5 4 3 2 1 0x24 COM0A1 COM0A0 COM0B1 COM0B0 - WGM01 WGM00 Read/Write R/W R Initial Value Bit 7- 6 : Compare match Output A Mode These bits control the Output Compare pin (OC0A) behavior. If one or both of the COM0A0:1 bits are set, the 0C0A output overrides the normal port functionality of the I/0 pin it is connected to. Note, however, that the Data Direction Register (DDR) bit corresponding to the OC0A pin must be set to enable the output driver COM0A1 COM0A0 Description Normal port operation, OC0A disconnected. 1 WGM02 = 0: Normal Port Operation, OC0A Disconnected. WGM02 = 1: Toggle OC0A on Compare Match. Clear OC0A on Compare Match when up-counting. Set OC0A on Compare Match when down-counting. Set OC0A on Compare Match when up-counting. Clear OC0A on Compare Match when down-counting. We’ll set COMOA to 3. TCCR0A = (3<<COMOA0);

48 1. TCCR0A Register (Continued)
Bit 7 6 5 4 3 2 1 0x24 COM0A1 COM0A0 COM0B1 COM0B0 - WGM01 WGM00 Bit 1-0 : Waveform Generation Mode Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting sequence of the counter, the source of the maximum (TOP) counter value, and what type of waveform generation to be used. Mode WGM02 WGM01 WGM00 Timer/Counter Mode of Operation TOP Update of OCRx at TOV Flag Set on(1)(2) Normal 0xFF Immediate MAX 1 PWM, Phase Correct BOTTOM 2 CTC OCRA 3 Fast PWM 5 7 Set for Phase Correct PWM (Note we still have to set WGM02 in the TCCR0B Register.) TCCR0A = (3<<COMOA0) | (1<<WGM00);

49 Timer/Counter Mode of Operation
2. TCCR0B Register Bit 7 6 5 4 3 2 1 0x25 FOC0A FOC0B - WGM02 CS02 CS01 CS00 Bit 3 : Waveform Generation Mode Use table from previous slide Mode WGM02 WGM01 WGM00 Timer/Counter Mode of Operation TOP Update of OCRx at TOV Flag Set on(1)(2) Normal 0xFF Immediate MAX 1 PWM, Phase Correct BOTTOM 2 CTC OCRA 3 Fast PWM 5 7 Setting for Phase Correct PWM TCCR0B = (0<<WGM02);

50 2. TCCR0B Register (Continued)
Bit 7 6 5 4 3 2 1 0x25 FOC0A FOC0B - WGM02 CS02 CS01 CS00 Bit 2:0 : Clock Select These bits select the clock source to be used by the Timer/Counter CS02 CS01 CS00 Description No clock source (Timer/Counter stopped) 1 clkI/O/(No prescaling) clkI/O/8 (From prescaler) clkI/O/64 (From prescaler) clkI/O/256 (From prescaler) clkI/O/1024 (From prescaler) External clock source on T0 pin. Clock on falling edge. External clock source on T0 pin. Clock on rising edge. Depends on the Frequency needed. We’ll choose a prescaler of 8. TCCR0B = (0<<WGM02) | (2<<CS00);

51 3. OCR0A Register TCCR0A = (3<<COMOA0) | (1<<WGM00);
The Output Compare Register A contains an 8-bit value that is continuously compared with the counter value (TCNT0). A match can be used to generate an Output Compare Interrupt, or to generate a waveform output on the OC0A pin. For PWM, this will be how you set the duty cycle by setting it equal to the duty cycle times to TOP value. For example, to set this to a 50% duty cycle for our example, Or, we can let the computer do the math! TCCR0A = (3<<COMOA0) | (1<<WGM00); TCCR0B = (0<<WGM02) | (2<<CS00); OC0A = (unsigned int) 0.50 * 255;

52 Arithmetic Operators

53 Data Access and Size Operators

54 Miscellaneous Operators

55 Relational & Logical Operators

56 Bitwise Operators AND OR XOR 0 & 0 = 0 0 | 0 = 0 0 ^ 0 = 0 0 & 1 = 0
0 | 1 = 1 0 ^ 1 = 1 1 & 0 = 0 1 | 0 = 1 1 ^ 0 = 1 1 & 1 = 1 1 | 1 = 1 1 ^ 1 = 0

57 Steps to Programming Write Program (AVR Studio) Transfer code to Chip
Write Code (One module at a time!) Debug in Simulator mode* Create .hex code Transfer code to Chip Connect USB Programmer (AVRISP MKII) to computer and breadboard Use AVR Studio to download program Place chip in final position and run *Turn off the compiler's optimization for debugging.

58 AVR Studio 4.13 Select New Project

59 Create a new Project Select AVR GCC for programming in C
Select Project Name (no spaces) Set Location to your folder Click “Next”

60 Use “AVR Simulator” Select “ATmega168” Click “Finish”

61 Create the Code Enter Code Select “Build” Choose “Debug”

62 Debug Program Walk through code, watch settings for
PORTB, DDRB, and PINB in lower right pane. Note: LED lights up when PB4 is “off”

63 Setup Breadboard for Programming ATmega168
Connect USB Programmer to computer and 6-pin header to breadboard

64 Atmel’s AVRISP mkII USB ISP
LED Color Description Red Idle – No target power Green Idle – With target power Orange Busy – Programming Orange blinking Reversed target cable connection, or not correct pull-up on the reset line. Red blinking Short-circuit on target Red-Orange blinking Upgrade mode There is also a green LED inside the AVRISP mkII enclosure next to the USB connector. This LED indicates USB traffic

65 Make Connection to AVRISP mkII
Click “Connect”

66 Make Connection to AVRISP mkII
Select “AVRISP mkII” and click “Connect…”

67 Verify Parameters (1/3) Correct Device
Select ISP Frequency > 5K (Caution: too high and it won’t transfer)

68 Verify Parameters (2/3) De-select CKDIV8 (divides clock by 8)
Be sure to select the Internal clock as selecting an external may lock-up the device until you connect an oscillator.

69 Verify Parameters (3/3) Set Path to HEX file

70 Download Program

71 Structure of Code In this Order! //Definitions
#define THRESHOLD 125 /* Light Threshold */ //Global Variables int speed //Functions void motor (int mtr, int speed) { } //Behaviors void behaviors() //Main void main () In this Order!


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