1. Power Electronic Devices
Electrical Energy Conversion and Power Systems
Universidad
de Oviedo
Power Electronic Devices
Semester 1
Power Supply Systems
Lecturer: Javier Sebastián

2. Outline
Review of the physical principles of operation of semiconductor devices.
Thermal management in power semiconductor devices.
Power diodes.
Power MOSFETs.
Power IGBTs
High-power, low-frequency semiconductor devices (thyristors).

3. Semester 1 - Power Electronic Devices
Electrical Energy Conversion and Power Systems
Universidad
de Oviedo
Lesson 4 - Power MOSFET.
Semester 1 - Power Electronic Devices

4. Outline
The main topics to be addressed in this lesson are the following:
Review of the basic structure and operation of low-power MOSFETs.
Internal structures of power MOSFETs.
Static characteristics of power MOSFETs.
Dynamic characteristics of power MOSFETs.
Losses in power MOSFETs.

5. P-channel enhancement MOSFET N-channel enhancement MOSFET
Review of the basic structure of low-power MOSFETs.
Structure
Name
Ohmic contact
Metal
Metal G S D
SiO2 D S G + P-
Substrate N+
Oxide
Semiconductor G D S
P-channel enhancement MOSFET
Schematic symbol
Schematic symbol
N-channel enhancement MOSFET
G (Gate)
D (Drain)
S (source)
Substrate

6. Review of the operation of low-power MOSFETs (I).G D S + P-
Substrate N+ V1
Depletion layer
(space charge) +
++ ++ G D S + P-
Substrate N+
A thin layer containing mobile electrons (minority carriers) is induced
V2 > V1 -

7. This is a depletion layer (without carriers)
Review of the operation of low-power MOSFETs (II).
V3 = V TH > V2 G D S + P-
Substrate N+
This thin layer containing mobile electrons (minority carriers) is called inversion layer
This is a depletion layer (without carriers)
When the electron concentration in the new thin layer of electrons is the same as the hole concentration in the substrate, we say that the inversion process has started.
The gate voltage corresponding to this situation is the threshold voltage, VTH.
It should be noted that the inversion layer is like a new N-type region artificially created by the gate voltage.

8. Review of the operation of low-power MOSFETs (III).
V4 > V TH G D S P P-
Substrate N+
Inversion layer when the voltage between gate and substrate is higher than VTH.
vDS iD
vGS G D S P-
Substrate N+
Now, we connect terminal source to terminal substrate.
Moreover, we connect a voltage source between terminals drain and source.
How is the drain current iD now?

9. Review of the operation of low-power MOSFETs (IV).
Now, there is a N-type channel due to the inversion layer.
This channel allows the current to pass from the drain terminal to the source terminal.
With low values of vDS (i.e., vDS << vGS), the channel shape is uniform.
vGS G D S P-
Substrate N+
vDS = vDS1 > 0 iD
If the value of vDS approaches vGS, then the channel shape is not uniform any more.
This is the normal situation when the MOSFET is working in linear applications, which is very different from the case of switching applications.

10. Review of the operation of low-power MOSFETs (V).
Operation when vGS = 0. G D S P-
Substrate N+
iD» 0
vDS2 > vDS1
vDS1 G D S P-
Substrate N+
iD» 0
Drain current iD is practically zero when vGS = 0, because no channel exists between drain and source.
The same occurs for any vGS < VTH (i.e., iD » 0).

11. Behaviour as current source Open-circuit behaviour
Review of the operation of low-power MOSFETs (VI)
Graphical analysis.
vDS [V]
iD [mA] 4 2 8 12
Load line + -
vDS iD
vGS
2.5kW
10V G D S
vGS = 4.5V
vGS = 4V
Resistive behaviour
Behaviour as current source
vGS = 3.5V
vGS = 3V
vGS = 2.5V
vGS < VTH = 2V
Open-circuit behaviour
VGS = 0V
< 2.5V
< 3V
< 3.5V
< 4V
< 4.5V

12. Review of the operation of low-power MOSFETs (VII)
Parasitic diode. D S G + P-
Substrate N+ G D S
There is a parasitic diode between drain terminal and source terminal due to the internal connection between substrate and source.

13. Source-body connection
Internal structure of power MOSFETs (I).
A typical transistor is constituted of several thousand cells.
As all the FET devices, MOSFET can be easily connected in parallel.
They are vertical MOSFETs.
Examples of cells: G D S
Gate
Source
Gate
Source
Source-body connection N+ N- P N+ N- P
Body
Body
Drain
Drain
V-groove MOS (VMOS)
Double diffused MOSFET (DMOS)

14. Source-body connection
Internal structure of power MOSFETs (II).
Other structures (I):
Drain N+ N- P
Source
Body
Gate
Drain N+ N- P
Source
Body
Gate
Source-body connection
MOSFET with trench gate (UMOSFET)
MOSFET with extending trench gate (EXTFET)
The breakdown voltage is limited to 25 V.

15. Source-body connection Source-body connection
Internal structure of power MOSFETs (III).
Other structures (II):
Source-body connection N+ N- P+ P-
Drain
Source
Gate
Body
Source-body connection
Drain N+ N P
Source
Body
Gate
NA-body
ND-source
Doping
ND-drain-
ND-drain+
MOSFET with graded doped (GD) and trench gate
Structure with charge coupled PN super-junction in the drift region (CoolMOS TM)
Also for low voltage (breakdown voltage is about 50 V).
3 times better for V devices.

16. Internal structure of power MOSFETs (IV).
Tridimensional structure of a DMOS:
Gate
Source
Body
Drift region
Drain N+ N- P

17. Packages for power MOSFETs (I).
Packages are similar to those of power diodes (except axial leaded through-hole packages).
There are many different packages.
Examples: 60V MOSFETs.
RDS(on) = 12 mW, ID = 57 A
RDS(on) = 9.4 mW, ID = 12 A
RDS(on) = 5.5 mW, ID = 86 A
RDS(on) = 9 mW, ID = 93 A
RDS(on) = 1.5 mW, ID = 240 A

18. Packages for power MOSFETs (II).
Other examples of 60V MOSFETs.
RDS(on) = 3.4 mW, ID = 90 A

19. Information given by the manufacturers.
Static characteristics:
- Drain-source breakdown voltage.
- Maximum drain current.
- Drain-source on-state resistance.
Gate threshold voltage.
Maximum gate to source voltage.
Dynamic characteristics:
- Parasitic capacitances.

20. Drain-source breakdown voltage, V(BR)DSS.
It is the drain-source breakdown voltage when the gate terminal is connected to the source terminal.
It corresponds to a specific value of the drain current (for example, 0.25 mA).
ID = 0.25 mA
V(BR)DSS G D S

21. Maximum drain current.
Manufacturers provide two different values (at least) :
- Maximum continuous drain current, ID.
- Maximum pulse drain current, IDM.
ID depends on the mounting base (case) temperature.
At 100 oC, ID = 23·0.7 = 16.1 A

22. Drain-source on-state resistance, RDS(ON) (I).
It is one of the most important characteristics in a power MOSFET. The lower, the better.
For a given device, its on-resistance decreases with the gate voltage, at least until this voltage reaches a specific value.
Power MOSFETs typically increase their on-resistance with temperature. Under some circumstances, power dissipated in this resistance causes more heating of the junction, which further increases the junction temperature, in a positive feedback loop.
If a MOSFET transistor produces more heat than the heat sink can dissipate, then thermal runaway can still destroy the transistors. This problem can be alleviated by lowering the thermal resistance between the transistor die and the heat sink.
Thermal runaway refers to a situation where an increase in temperature changes the conditions in a way that causes a further increase in temperature, often leading to a destructive result. It is a kind of uncontrolled positive feedback.
However, the increase of on-resistance with temperature helps balance current across multiple MOSFETs (and MOSFET cells) connected in parallel, so current hogging does not occur.

23. Drain-source on-state resistance, RDS(ON) (II).
RDS(ON) increases with temperature.
RDS(ON) decreases with VGS.
Drain-source On Resistance, RDS(on) (Ohms)

24. Drain-source on-state resistance, RDS(ON) (III).
Comparing different devices with a given value of ID, the value of RDS(on) increases with V(BR)DSS.

25. Drain-source on-state resistance, RDS(ON) (IV).
The use of new internal structures (such as charge coupled PN super-junction in the drift region) has improved the value of RDS(ON) in devices in the range of V.
Year 1984
Year 2000

26. Gate threshold voltage, VGS(TO) (I).
ID = 1 mA
VGS(TO) G D S
Manufacturers define VGS(TO) with the gate terminal connected to the drain terminal and at a specific value of ID (e.g., 0.25 mA or 1 mA)
Standard values of VGS(TO) are in the range of 2-4 V.

27. VGS(TO) depends on the temperature:
Gate threshold voltage, VGS(TO) (II).
VGS(TO) depends on the temperature:

28. Maximum gate to source voltage, VGS.
Frequently, this value is ± 20V.

29. Parasitic capacitances in power MOSFETs (I).
Power MOSFETs are faster than other power devices (such as bipolar transistors, IGBTs, thyristors, etc.).
This is because MOSFETs are unipolar devices (no minority carriers are stored at the edges of PN junctions).
The switching speed is limited by parasitic capacitances.
Three parasitic capacitances should be taken into account:
- Cgs, which is a quite linear capacitance.
- Cds, which is a non-linear capacitance. S D G
Cdg
- Cdg, Miller capacitance, which is also a non-linear capacitance.
Cds
Cgs

30. Parasitic capacitances in power MOSFETs (II).
Manufacturers provide information about three capacitances, which are different from the ones mentioned in the previous slide (however, they are directly related with them):
- Ciss = Cgs + Cgd with Vds=0 (input capacitance). Ciss » Cgs.
- Crss = Cdg (Miller or feedback capacitance).
- Coss = Cds + Cdg (output capacitance). Coss » Cds. S D G
Cdg
Cgs
Cds S D G
Cdg
Cgs
Cds
Coss
Ciss

31. Parasitic capacitances in power MOSFETs (III).
Example of information provided by manufacturers.
Ciss = Cgs + Cgd
Crss = Cdg
Coss = Cds + Cdg

32. Switching process in power MOSFETs (I).
Analysis of the switching process assuming:
- Inductive load (frequent situation in power electronics).
- Clamping (or free wheeling) diode.
- Ideal diode. V1 R V2 IL
Cdg
Cds
Cgs

33. Switching process in power MOSFETs (II).
Starting situation:
- The power transistor is off and power diode is on.
- Therefore:
vDG = V2, vDS = V2 and vGS = 0.
iDT = 0 and iD = IL.
Cdg
Cgs
Cds V1 R V2 IL
- From this situation, the mechanical switch changes from position “B” to “A”. iD + -
vDG
iDT + -
vDS + - + - B A
vGS + -

34. Switching process in power MOSFETs (III).
iDT = 0 while vGS < VGS(TO)
vDS = V2 while iDT < IL (the diode is on).
vDS
iDT
vGS
B®A
VGS(TO) IL V2
This slope depends on R, Cgs and Cdg. + -
vDS
vGS
vDG
Cdg
Cgs
Cds V1 R V2 IL
iDT iD B A + - + - + -

35. Switching process in power MOSFETs (IV).
The current provided by V1 through R is mainly used to discharge Cdg Þ almost no current is used to charge Cgs Þ vGS = constant.
As a consequence, the Miller plateau appears.
VGS(TO)
vDS
iDT
vGS
B®A IL IL
vDG +
iDT
Cdg + -
vDS - + - + - A V2 V1 +
Cds R + - B
vGS
Cgs -

36. Switching process in power MOSFETs (V).
Cgs y Cdg complete the charging process.
VGS(TO)
vDS
iDT
vGS
B®A IL V1
The time constant depends on R, Cgs and Cdg. + -
vDS
vGS
vDG
Cdg
Cgs
Cds V1 R V2 IL
iDT B A + -

37. Switching process in power MOSFETs (VI).
VGS(TO)
vDS
iDT
vGS
B®A IL
Computing losses between t0 and t2:
- The control voltage source V1 has to charge Cgs (large) from 0 to VM and discharge Cdg (small) from V2 to V2-VM.
- There is high voltage (V2) and increasing current (from 0 to IL) in the MOSFET at the same time (from t1 to t2). VM
iDT + -
vDS
vGS
Cdg
Cgs
Cds V2
PVI

38. Switching process in power MOSFETs (VII).VM t0 t1 t2 t3
VGS(TO)
vDS
iDT
vGS
B®A IL
PVI
Computing losses between t2 and t3:
- The control voltage source V1 has to discharge Cdg from V2-VM to -VM.
- There is high current (IL) and decreasing voltage (from V2 to 0) in the MOSFET at the same time (from t2 to t3).
iDT = IL + -
vDS
vGS
Cdg
Cgs
Cds IL

39. Switching process in power MOSFETs (VIII).VM t0 t1 t2 t3
VGS(TO)
vDS
iDT
vGS
B®A IL
PVI
Computing losses after t3:
- The control voltage source V1 has to charge Cgs from VM to V1 and Cdg from -VM to -V1.
- There is high current (IL), but the voltage is very low. Therefore, there are only conduction losses.
iDT = IL + -
vDS
vGS
Cdg
Cgs
Cds IL

40. Switching process in power MOSFETs (IX).
The switching speed strongly depends on the gate charge Qg. The gate charge is the electric charge that the driving circuitry must provide for switching the MOSFET.
- The driving circuitry must provide the gate-source charge Qgs from t0 to t2.
- The driving circuitry must provide the gate-drain charge Qgd from t2 to t3.
- The driving circuitry must provide more electric charge for the gate voltage to reach the final value V1. The gate charge Qg includes this charge and the addition of Qgs + Qgd.
- For a given driving circuitry, the lower Qg, the faster the switching process.
- Obviously, t2-t0 » QgsR/V1, t3-t2 » QdgR/V1 and PV1 = V1QgfS, where fS is the switching frequency.
vGS
iV1 t0 t2 t3
Qgd
Qgs Qg V1
iV1 R

41. Switching process in power MOSFETs (X).
Example of information provided by manufacturers:
IRF 540
BUZ80
Year 1984
Year 2000

42. Power losses in power MOSFETs (I).
Static losses:
Reverse losses Þ negligible in practice due to the low value of the drain current at zero gate voltage, IDSS.
Conduction losses, due to RDS(on):
PMOS_cond = RDS(ON)·ID_RMS2,
where ID_RMS is the RMS value of the drain current.
Switching (dynamic) losses:
Turn-on losses and turn-off losses.
Driving losses.

43. Power losses in power MOSFETs (II).
vDS
iDT
vGS
PVI
PMOS_cond = RDS(on)·ID_RMS2
PMOS_S = fS(won + woff)
Won
Switching losses
Conduction losses
Woff

44. Actual circuit to have low R equivalent values
Power losses in power MOSFETs (III). V1
iV1 R
Equivalent circuit
Driving losses.
vGS
iV1 t0 t2 t3
Qgs
Qgd Qg
PV1 = V1QgfS V1
iV1 RB
Actual circuit to have low R equivalent values
It should be noted that for a given MOSFET, the switching times decrease when R decreases, thus allowing higher values of iV1.
Moreover, the lower the switching times, the lower the switching losses.

45. The parasitic diode in power MOSFETs (I).
It usually is a slow diode, especially in the case of high voltage MOSFETs.
IRF 540 G D S

46. The parasitic diode in power MOSFETs (II).
Case of a high voltage MOSFET structure (e.g., charge coupled PN super-junction in the drift region).