1. Electro-Chemical Migration Definition Stage Project Wallace Ables - Dell HDP User Group Member Meeting Host: Panasonic Bennington, Vermont September 25, 2013 Presented by: Mike Bixenman © HDP User Group International, Inc.

2. 2 Problem Statement The current industry standard test protocols were originally developed to identify highly ionic contaminant levels (halides) after a cleaning process. These test protocols are not completely effective at identifying ECM and corrosion exposures from no-clean flux residues. © HDP User Group International, Inc.

3. 3 Background 1. Products assembled with no clean flux systems are experiencing various forms of corrosion and Electro Chemical Migration failures. These products and flux systems have passed the current industry standard cleanliness and corrosion resistance testing, demonstrating that these test procedures are not completely effective. 2. The failure mechanisms occur on products assembled for all segments of the electronics industry. 3. The current industry standard testing does not take into consideration various acceleration factors associated with no clean flux and product design features. © HDP User Group International, Inc

4. 4 Project Goal Identify the required enhancements to Current industry specifications Test methods Test boards Coupon design to increase detection of ECM Corrosion induced failures when no clean flux systems are used © HDP User Group International, Inc.

5. Project Scope 5 Areas to investigate:  Cleanliness testing  Corrosion resistance testing  ECM testing  Maximum acceptable residue levels  Influence of PCB manufacturing defects  Influence of PCBA design features Areas not to be investigated: Conformal coating over no-clean fluxes. This may allow ECM under the conformal coating. Solder mask test standards for ECM controls. ImAg creep corrosion (covered by multiple current projects) © HDP User Group International, Inc.

6. 6 Project Objectives 1.Identify modification to current industry standard specifications and test methods for cleanliness testing, corrosion resistance testing, and ECM testing to increase detection of failures when no clean flux systems are used. Primary areas of investigation: a.Characterize failures escaping current test methods b.Test flux residue levels: SMT, Wave Solder, Rework c.Test flux application methods: controls, acceptable application levels, measurement methods and test methods d.Enhance test board and test coupon designs e.Identify acceptable flux residue levels by product class © HDP User Group International, Inc.

7. 7 Project Objectives 2.Identify the influence of PCB manufacturing defects and design properties on the development of ECM and corrosion failures. Primary areas of investigation: a.Exposed Cu from solder mask openings (pin holes, undercut, damage, etc.) b.Moisture and chemical absorption properties c.Minimum cure level d.Voltage bias on a trace e.Minimum spacing between positive and negative features to prevent ECM © HDP User Group International, Inc.

8. 8 Project Execution Plan How the project will answer the Goal and Objectives Compile list of current test methods / standards / test vehicles Compile list of failure modes from team members Correlate corrosion failures to gaps in current test methods Identify modifications required to current test methods Develop DOE’s to validate proposed changes Perform DOE’s. Collect and evaluate test data Draft proposed changes to test methods / standards / test vehicles Provided proposed changes and supporting data to test standard owners. Write final report

9. 9 Definition Stage 1. Complete list of current test methods/standards/test vehicle. 2. Compile list of failure modes from team members. 3. Complete Phase 1 DOE 4. Develop Phase 2 DOE 5. Correlate corrosion failures to gaps in current test methods. 6. Identify modifications required to current test methods. 7. Develop Phase 3 DOE’s to validate proposed changes. 8. Perform Phase 3 DOE’s, collect and evaluate data. 9. Draft proposed changes to test methods/standards/test vehicle. 10. Provide proposed changes and support data to test standards owner. 11. Write final report Project Execution Plan Complete In-Process Implementation Stage Not Started

10. Project Flow Plan Select Test Vehicle Cleanliness CK.. Fabricate Boards Assemble Bds. ATC Test Failure Analysis Write Report and spec changes Ø3 Full Variables Phase (IPC B-52?) D Modified SM Assembled Bds. T&H Testing Verify corrosion Reproducibility Existing product used Ø1 Verification Phase (Product) Testing in process By Vendor Modify B-52 Artwork Fabricate Boards Assemble Bds. ATC Test Failure Analysis Cleanliness CK. Ø2 Correlation Phase (IPC B-52) To be Completed by team

11. Completed list of current test methods Completed identification of failure modes observed with no clean residues Started gathering existing possible Test Vehicles. Have met with IPC sub-committees on Coatings, Cleaning and Testing to discuss our activity. Established the basic project plan. Implemented Phase 1 DOE. Testing in process. Identified the variables to be used in Phase 2 DOE. Planning implementation of Phase 2 DOE to recreate failure mechanism on the Test Vehicle. 11 Current Project Activities 20 21-23

12. Reproduce the open trace corrosion failure mode in a test environment First Phase initial build on real product samples OSP finish 10 pieces with solder mask openings created prior to assembly. Multiple locations, multiple sizes. (Done) 10 pieces with solder mask openings created after wave solder. Multiple locations, multiple sizes. (Done) Characterize flux amount applied, and flux residue remaining on the boards (Open) – – C3 testing of flux residue levels T&H Testing (In process) – – 40 C, 90% RH – – Boards powered during test, Test to failure 12 Ø1 Status

13. 13 Solder mask openings were created on test samples before the SMT process, and after the wave solder process Before SMT 3V Bi as After Wave 3V Bias Before SMT No Bias After Wave No Bias 6/17 first week7/17/157/298/12 7/157/298/12

14. Second Phase: Using the IPC B-52 standard test board we would have the following variables: – – Low Rosin (Alpha EF6000) and High Rosin (Alpha EF8000) fluxes – – Low flux loading and High Flux loading – – 0-3V and 0-10V – – Acceleration test parameters (Temp, Humidity, time, etc) – – Cycling temperature range: 0-100ºC The B52 test board would be modified to place the SIR combs on the bottom side to provide the solder mask openings over traces under voltage. The solder mask artwork would be modified to provide opening over the SIR traces for flux contact. The existing bottom side 0603 pads will be used as corrosion sites to simulate test pads with voltage bias. 14 Ø2 Plan

15. 15 Ø2 DOE The current DOE test matrix would require 24 samples for two replicates.

16. 16 Ø2 Test Vehicle IPC B-52 Test Board Move to bottom side, add solder mask openings Existing 0603 pads to be used as test pad corrosion sites

17. Ø2 Correlation Testing 17 To compare the corrosion results on the B-52 test boards to standard flux qualification results, we will also assemble the appropriate test coupons (IPC B-24/25, Cu laminate, etc.) for each flux evaluated for the following tests. SIR test: TM650, 2.6.3.7 Cu mirror test: TM650, 2.3.32 Flux corrosion test: TM650, 2.6.15C Solids Content, Flux: TM650, 2.3.34

18. Determine how to apply the information learned in phase #2 to identify weakness or changes to the current industry standard test protocols and coupon designs Evaluate different process settings to identify threshold for failures: – – Flux amount applied – – Flux type used – – Flux residue Amount of residue after wave solder Activity level of residue Presence of solder mask opening prior to or after wave solder Impact of voltage level Impact of moisture level – – Process parameters Impact of preheat and wave contact time on residue levels – – Correlation to current flux qualification test results 18 Ø3

19. Team Members –To Date 19 © HDP User Group International, Inc. Agilent Alcatel-Lucent Arlon ASE Celestica Ciena Cisco Cobar Dell Emerson Ericsson Flextronics Fujitsu H3C Huawei IBM Isola IST Group Kyzen Medtronic Nihon-Superior Oracle Panasonic Phillips Plexus Rockwell Suntak Shengyi TTM Tech Ventec Zestron ZTE

20. 20 Industry Standard Test Methods to consider

21. 21 No clean flux failure modes Failure mode dependencies: Openings or defects in solder mask Voltage bias Activity level, type, and quantity of flux residue Humidity levels © HDP User Group International, Inc. Potential areas to investigate with current test methods: Modify test coupon to detect crevice or pitting corrosion failure modes? Solder mask openings on test coupon (pitting corrosion) Flux trapped under low stand off connections (crevice corrosion) Measure flux residue levels (identify threshold of acceptable residual flux contaminants) Multiple voltages to traces or nets on the test coupon (identify voltage level sensitivity) Multiple humidity levels Corrosion Mechanism: A form of crevice or pitting corrosion at the small solder mask opening and the trace. Open Trace Corrosion Failure

22. 22 No clean flux failure modes Failure mode dependencies: Voltage bias Activity level, type, and quantity of flux residue Humidity levels © HDP User Group International, Inc. Potential areas to investigate with current test methods: Measure flux residue levels (identify threshold of acceptable residual flux contaminants) Multiple voltages to traces or nets on the test coupon (identify voltage level sensitivity) Multiple test pad and hole sizes Multiple surface finishes Multiple humidity levels Corrosion Mechanism: Surface corrosion + 3V GND Non soldered OSP+ 3V Surface Corrosion Failure

23. 23 No clean flux failure modes Failure mode dependencies: Openings or defects in solder mask (exposed anode / + voltage) Voltage bias Activity level and quantity of flux residue Humidity levels © HDP User Group International, Inc. Potential areas to investigate with current test methods: Modify test coupon to provide exposed anode adjacent to ground features (already exists?) Measure flux residue levels (identify threshold of acceptable residual flux contaminants) Multiple voltages to traces or nets on the test coupon (identify voltage level sensitivity) Corrosion Mechanism: Electrochemical Migration – metal dendrite growth + 3V anode GND ECM Corrosion Failure