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Published byAnthony Howard Modified over 9 years ago
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Combinational circuit that selects binary information from one of many input lines and directs information to a single output line.
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Selection inputs. 2 n input lines. n selection inputs. Data selector Selects one of many inputs and steers binary information to output line.
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ABf 00 C0 01 C1 10 C2 11 C3
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AND gates and inverters in multiplexer resemble a decoder circuit. 2 n - to – 1 line MUX is constructed from n-to- 2 n decoder by adding 2 n input lines. MUX blocks can be combined in parallel with common selection & enable lines.
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4 multiplexers Each capable of selecting one of two input lines. 1A 1Y 1B Input selection line S selects one of lines in each of four MUXs. Enable input E must be active for normal operations.
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Inverse of MUX Demultiplexer receives information from a single line and transmits it to one of 2 n possible output lines. Selection of specific output is controlled by bit combination of n selection lines.
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Identical to 2-to 4 line decoder with enable output. InputsEnable Decoder S1 & S0E DemultiplexerES1 & S0
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