1. Midterm Wednesday 11/19 Overview: 25% First Midterm material - Number/character representation and conversion, number arithmetic - DeMorgan’s Law, Combinational logic elements, PLA’s & sequential logic elements (flip flops), and design (including debounce) - Memory organization and implementation - Clocks and Synchronous/Asynchronous timing 25% State Machines, State Transition Tables, & Implementation 25% Addressing Modes, LC-3 Architecture, Memory Map, LC-3 Machine Language, & Assembly Language Programming 25% Traps, Subroutines, I/O, & Stacks (More Assy Lang Prog) You will be able to use the “Programming Card”, and list of Trap Routines

2. Interrupts Chapter 8 – pp 209-214 Chapter 10 – pp 258-264 Appendix A – pp 537 & 543-545

3. Interrupts & Exceptions Interrupts: - Asynchronous external requests for service (think device needing service). - Being asynchronous, Interrupts can occur anyplace in your program! - They are a normal event, and shouldn’t interfere with the normal running of your program. Exceptions: - “Synchronous” internal requests for service based upon abnormal events (think illegal instruction, illegal address, overflow, hardware malfunction, or …). - Exceptions occur when the abnormal event happens. - They are abnormal events and often result in the termination of a program, or the execution of a “recovery” before continuing. Interrupt/Exception Vector Table: (256 Address Vectors) - x0100 – 017F: Used for addresses for exception service routines. Vector # is provided by the CPU. - x0180 – 01FF: Used for addresses for interrupt service routines. Vector # is provided by Devices.

4. Program Context: PC, PSW (PSR), & SP (R6) Program Status Register PSR (PSW): PSR[15] – Privilege Bit - 0 for Privileged (Supervisor) State 1 for User State PSR[10:8] – Priority Bits - Eight Levels (7 is the highest) PSR[2:0] – Condition codes - N, Z, P Stack Pointer USP & SSP: User Stack Pointer & System Stack Pointer USP.saved & SSP.saved: Two auxiliary registers that are used to store the value of the Stack Pointer (User or Supervisor) that is not in use. This is done automatically when the PSR[15] bit is switched. - When in User Mode (PSR[15] = 1), R6 is the User Stack Pointer and SSP.Saved contains the Supervisor Stack Pointer. - When in Supervisor Mode (PSR[15] = 0), R6 is the Supervisor Stack Pointer and USP.Saved contains the User Stack Pointer.

5. Interrupt Process This is important to understand ! 1) Programmer Action: Loads a Service Routine for the Device, and enters its Entry Addr in the Interrupt Vector Table Enables Interrupts by setting “intr enable” bit in Device Status Reg 2) Device Action to Request an Interrupt: When device wants service, (done or ready bit set) and - its priority is higher than the priority of the Presently Running Program, and - execution of the present instruction is complete, then The Device submits an “Interrupt Request”, and when granted, supplies the Interrupt Vector # 3) Processor Action to Initiate Service of the Interrupt: When the Processor accepts the Interrupt Request (Priority higher than the present Priority) - The Processor goes into Privileged Mode (PSR bit 15 cleared) - (R6)  USP.saved register and (SSP.saved)  R6 - The Processor saves the “state” of the program (has to be able to return) The (PC) and the (PSR) are PUSHED onto the Supervisor Stack (Other reg are not. Why?) - Priority level is set (established by the interrupting device) and the CC’s are cleared Then the PC is loaded with the service routine address (between 100 and 180). (Based upon the Device supplied Interrupt Vector #: 00 to 80) 5) Interrupt Service Routine is Executed: - It resets the Done or Ready bit in the DSR (Likely reads from or writes to the DDR) - Ends with an RTI 6) RTI Initiates Return of Control to the Interrupted Program: - The stored User PSR (POPed into PSR), PC (POPed into PC), - (R6)  SSP.saved, (USP.saved  R6), - and the next instruction in the interrupted program is fetched An interrupt can occur “anywhere” in a computer program, unlike Trap Calls or Subroutine Calls which occurs exactly where you place them !

6. Interrupt Components Device Computer Note: The Device also supplies the Service Routine Priority. That is not shown here.

7. Interrupt Example Intr Vectors Program flow Supervisor Stack

8. Interrupt Driven Keyboard Service Routine Demonstrate a Program with an Interrupt Service Routine using: LC3Edit and LC3Simulate Program: Program consists of a main program and a keyboard service routine. Program will Print “Input an Endless Character String: “ and loop forever. Program Steps: “Create Stack” Set up the Keyboard to be able to Interrupt Print prompt Loop

9. LC-3 Architecture - Figure C.8