1. Degradation Effects in A-Si:H Thin Film Transistors and Their Impact on Circuit Performance D.R. Allee, L.T. Clark, R. Shringarpure, S.M. Venugopal, Z.P. Li, and E.J. Bawolek Flexible Display Center Arizona State University FDC

2. 2 Purpose Review Degradation Mechanisms of a- Si:H TFTs in Light of Recent Experiments Highlight Similarities to NBTI Determine Impact of Degradation on Active Matrix Backplanes Determine Impact of Degradation on General Digital a-Si:H Circuitry Potential Applications of Flexible a-Si:H Systems

3. 3 Outline Introduction A-Si:H Thin Film Transistors Degradation of A-Si:H TFTs –Localization of Degradation –Threshold Voltage Recovery Impact on Circuit Performance –Degradation of Displays & Digital Logic –Circuit Simulator Incorporating Vth Shift Similarities to NBTI Conclusions

4. 4 Introduction Flexible Displays –Provide Situational Awareness –Lightweight –Rugged –Portable –Low Power –Daylight Readable

5. 5 A-Si:H TFT Performance 180C Process ParameterValue Yield100% Saturation Mobility 0.8 cm 2 /V-s ON/OFF Ratio 2 x 10 8 Threshold Voltage 1.3 V Hysteresis1.1 V Subthreshold Slope 0.58 Typical Vdd20V V GS (V)

6. 6 A-Si:H TFT Density of States Band Tail States –Weak Si-Si Bonds Deep States –Dangling Bonds –Amphoteric - 0,1,2 electrons –Mapped to Single Electron Density of States Trap States Must Fill Before Significant Drain Current

7. 7 Degradation of A-Si:H TFTs A-Si:H TFTs Age with Voltage on the Gate Mechanisms –Creation of Defect States –Charge Injection into Gate Insulator Threshold Voltage Rise is Proportional to –Inversion Charge –Time to ~0.3 Power Effect is Not Small! Shift Common to all a- Si:H Processes Shift More Severe for Low Temperature Processes

8. 8 Localization of Degradation Channel Charge Induces Defect Creation Linear Mode Stress Damages Entire Channel Saturation Mode Stress Does Not Damage Near Drain After Saturation Mode Stress –Reverse Linear I DS ‘Sees’ More Damage –Reverse Saturation I DS ‘Sees’ Less Damage

9. 9 Localization of Degradation After Linear Mode Stress I DS is Identical –In Both Linear and Saturation Regimes –For Both Forward and Reverse Configurations. Damage is Uniform Throughout Channel

10. 10 Localization of Degradation After Saturation Mode Stress I DS is NOT Identical –I DS Increases Only in Saturation Regime for Reverse Configuration Damage Must be Confined to Channel Interface.

11. 11 Threshold Voltage Recovery There is an apparent recovery of threshold voltage with several hours of no applied voltages.

12. 12 Threshold Voltage Recovery However, the threshold voltage quickly collapses to where it would have been without rest.

13. 13 Threshold Voltage Recovery However, the threshold voltage quickly collapses to where it would have been without rest. This plot removes rest time. Degradation of 5 latches are indistinguishable.

14. 14 Impact on Circuit Performance Lifetime of Display Backplanes –~10,000 hours Lifetime of Digital Logic –~ a few days! Integrated a-Si:H Source Driver

15. 15 Degradation of Digital Logic Digital circuits must have positive static noise margin to operate. Static noise margin eventually drops to zero with increasing threshold voltage.

16. 16 Degradation of Digital Logic Evolution of Noise Margin with Time Under Constant Gate Voltage Stress Measurements (dot), Simulations (asterix) and Analytical Equations (circle) Agree Reasonably Well Digital Circuit Lifetime Can Be Simply Expressed:

17. 17 Circuit Simulator Incorporating Vth Shift Can Now Model Circuit Performance Where Each TFT ‘Ages’ Differently –Effect of threshold voltage shift on a 10-transistor digital latch. –NGSpice simulation results match experiment reasonably well.

18. 18 Similarities to NBTI Increased Vth (magnitude) with Gate Voltage Stress Power Law Time Dependence, ~0.25 Mechanism: Stress Induced Interface Traps –Breaking of H Passivated Dangling Si Bonds –Both H+ and H 2 O Proposed As Attacking Species Some Recovery Possible with High T Anneals –But Recovery Not Thought to be Permanent Deuterium Passivated Bonds Reduce NBTI Figure from D.K. Schroder, with permission

19. 19 Conclusions Degradation of a-Si:H Rooted in Fundamental Physics Strong Similarities to NBTI Degradation Does Not Limit Practical Lifetimes of Active Matrix Backplanes Viability of Other Digital a-Si:H Circuits Will Depend on Specifications –Integrated Source Drivers for Displays –Flexible Active Medical Bandage Need for Accurate Models and Simulation Tools