1. CSE 144 Project Part 2

2. Overview Multiple rows Routing channel between rows Components of identical height but various width Goal: Implement a placement tool for standard cell design

3. Problems to be resolved Assignment of components to rows  Optimization goal: Reducing inter-row connections  Strategy: Slicing bisection algorithm Concrete row positions in each row  Optimization goal: Minimizing overall interconnect length in channels  Strategy: Simulated annealing algorithm

4. Row 1 Row-based component grouping Algorithm: slicing bisection for N-row layout  Need to slice (partition) the circuit into N rows  Rows should have similar size  Connection between rows are minimized  Repeatedly partition the circuit 3 7 5 1 4 6 2 Example: a 3-row design Row 2 Row 3

5. How to generate slicing? Slicing algorithm requires  unbalanced partitioning  minimized cutsize between rows Repeatedly apply Fiduccia-Mattheyses algorithm under varying area constraints Each partitioning step generates one new row

6. Row 1 Feed-through problem 3 7 5 1 4 6 2 Remaining rows Partitioning after the 1 st step Components 1&3 fixed in row 1 Component 2 connected with row 1 If component 2 assigned to row 3 in the next partition, a feed-through generated Need to consider the connections between components already assigned and components yet to be assigned

7. Row 1 Feed-through reduction (1) 3 7 5 1 4 6 2 Remaining rows Partitioning strategy  Always partition the complete set of components  Area constraints change for distinct step  Components already assigned fixed in Partition 1 Step 1 1 3 Fixed components

8. Feed-through reduction (1) 3 7 5 1 4 6 2 Partitioning strategy  Always partition the complete set of components  Area constraints change for distinct step  Components already assigned fixed in Partition 1 Step 2 1 3 Components 1 & 3 fixed in Partition 1 This strategy pushes components heavily connected with 1&3 to be assigned in Partition 1 too

9. Feed-through reduction (2) Penalize partitionings generating feed- throughs 3 7 5 1 4 6 2 Partitioning after the 1 st step Assign a large penalty value to edges between fixed components and unfixed components If 2 is not assigned to Partition 2 in the next partition (the case generating feed-through), cutsize significantly increased

10. Intra-row component arrangement 146 235 146 235 Arrange the components in each row to minimize the overall interconnect cost in the channel Interconnect cost model:  The overall length of horizontal wires  Ignore consider the feed-through wires

11. Simulated annealing algorithm Start from an initial arrangement Randomly change the position of one component (the position of its neighbors need to be adjusted accordingly) Accept moves that reduce cost; probabilistically accept moves that increase cost Try multiple moves at each temperature Terminate when the benefit is less than 2% in 3 successive temperatures

12. How to calculate cost? The horizontal wire length depends on pin positions in components Pin location specification Pin number increases from left to right Distance between two adjacent pins is 2 Each pin is of width 1 1 2 3 A 3-pin component

13. How to calculate cost? The cost of the example placement is 32

14. Summary Slicing bisection Simulated annealing Row generation Component arrangement Inter-rowIntra-row Goal: Algorithm: Issues to consider: Feed-through Cost model For the implementation of slicing bisection, we provide to you a set of candidate penalty values {1, 2, 5, 10, 15}, try them and figure out the best one