Download presentation

Presentation is loading. Please wait.

1
ECE 232 L5 Assembl.1 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers ECE 232 Hardware Organization and Design Lecture 5 MIPS Assembly Instructions Maciej Ciesielski www.ecs.umass.edu/ece/labs/vlsicad/ece232/spr2002/index_232.html

2
ECE 232 L5 Assembl.2 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Outline °Classes of instructions, formats R-type (register-register) I-type (immediate) J-type (jump) °MIPS assembly instructions Register access – operand(s) in registers Constant operands (immediate) Array access - operand in memory A[k] Making decisions (if then else) Branching further away °Pseudo instructions

3
ECE 232 L5 Assembl.3 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers MIPS R3000 Instruction Set Architecture °Instruction Categories Load/Store Computational Jump and Branch Floating Point -coprocessor Memory Management Special R0 - R31 PC HI LO 3 Instruction formats: all 32-bit wide Registers OPrs rt rdshftfunct R-type OPrs rt immediate I-type OP jump target J-type

4
ECE 232 L5 Assembl.4 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Register Instructions OPrs rt rdshftfunct R-type °Assume: g, h, i, j are stored in registers $s1 - $s4. Result f to be stored in $s0. °Compile: f = (g + h) – (i + j) into MIPS instructions: add $t0, $s1, $s2# register $t0 (g+h) add $t1, $s3, $s4# $t1 (i + j) sub $s0, $t0, $t1# $s0 $t0 - $t1

5
ECE 232 L5 Assembl.5 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Immediate format °Immediate = small constant stored in the instruction addi $sp, $sp, const# $sp $sp + const OP const I-type 16565 rtrs °Range of constant operand: const 2 16 -1 °Set on less-then, immediate slti $t0, $s2, const# $t0 1 if $s2 < const

6
ECE 232 L5 Assembl.6 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Operand in memory °Let A[ ] = array whose starting (base) address is in $s3; let variable h be associated with register $s2; °Compile: A[5] = h + A[8] into MIPS instructions: lw $t0, 32 ($s3) # $t0 A[8] add $t0, $s2, $t0 # $t0 h+$t0 sw $t0, 20 ($s3) # A[5] $t0 OPrs rt immediate I-type 8*4 = 32 bytes (byte-addressable) $s3 5*4 = 20 8765432187654321

7
ECE 232 L5 Assembl.7 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Array with variable index °A[ ] = array with base address in $s3; variables g, h, i associated with registers $s1, $s2, $s4 °Compile: g = h + A[i] into MIPS instructions: add $t1, $s4, $s4 # $t1 i+i = 2i add $t1, $t1, $t1 # $t1 2i+2i = 4i add $t1, $t1, $s3 # $t1 address of A[i] lw $t0, 0 ($t1) # $t0 A[i] add $s1, $s2, $t0 # $s1 h + A[i]

8
ECE 232 L5 Assembl.8 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers If statements °Let variables f, g, h, i, j be associated with $s0 - $s4 °Compile: if (i == j) go to L1; f = g + h; L1: f = f – i; into MIPS instructions: beq $s3, $s4, L1 # if i = j, go to L1 add $s0, $s1, $s2 # f = g + h (skipped if i=j) L1:sub $s0, $s0, $s3 # f = f – i (always executed)

9
ECE 232 L5 Assembl.9 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Jump instructions °Regular jump uses J-format j Label# jump to Label OP Label = jump target J-type °jr (jump on register address) uses R-format jr $t1# jump to A[($t1)] 26 OPrs 0 00funct R-type OP/funct = jr

10
ECE 232 L5 Assembl.10 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers If then else statements °Let variables f, g, h, i, j be associated with $s0 - $s4 °Compile: if (i == j) f = g + h; else f = g –h; into MIPS instructions: bne $s3, $s4, Else # if i j, go to Else add $s0, $s1, $s2 # f = g + h (skipped if i j) j Exit # go to Exit Else:sub $s0, $s1, $s2 # f = g – h (skipped if i = j) Exit: OP jump target J-type

11
ECE 232 L5 Assembl.11 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Pseudo-instructions °Let variables a, b be associated with $s0, $s1 °Compile: if (a < b) go to L into MIPS instructions: slt $t0, $s0, $s1# $t0 1 if $s0 < $s1 (a < b) bne $t0, $zero, L # if $t0 0, go to L °We can create pseudo-instruction: blt $s0, $s1, L °Special registers, useful in beq, bne, slt: °$zero is a special register, holds 0 °$at is another special register (1-bit) used in slt (set $at on less-then)

12
ECE 232 L5 Assembl.12 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Branching further away – pseudo-instruction °Consider a branch instruction beq $s0, $s1, L1# branch to L1 if $s0=$s1 °Change, to offer greater branching distance ( 2 26 -1): pseudo-instruction: beq $s0, $s1, Large bne $s0, $s1, L2# branch to L2 if $s0 $s1 j Large# unconditional jump to “Large” L2: OPrs rt immediate I-type 16 565 small constant ( 2 16 -1) OP Large – jump target J-type 626

13
ECE 232 L5 Assembl.13 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Loading large numbers °Instruction lui: load upper immediate lui $t0, const# $t0 [31:16] const 16 $to: const 0 163115 0000 0000 OP const I-type 16565 rt0

14
ECE 232 L5 Assembl.14 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers MIPS Addressing Modes/Instruction Formats immedoprsrt Immediate All instructions are 32-bit wide Base+index immedoprsrt register + Memory oprsrtrd register Register (direct ) PC-relative immedoprsrt PC Memory +

15
ECE 232 L5 Assembl.15 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Operation Summary Support these simple instructions, since they will dominate the number of instructions executed: load, store, add, subtract, move register-register, and, shift, compare equal, compare not equal, branch, jump, call, return;

Similar presentations

© 2021 SlidePlayer.com Inc.

All rights reserved.

To make this website work, we log user data and share it with processors. To use this website, you must agree to our Privacy Policy, including cookie policy.

Ads by Google