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KVM/ARM: The Design and Implementation of the Linux ARM Hypervisor Fall 2014 Presented By: Probir Roy
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Virtualization & Hypervisor www.qyjohn.net
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Virtualization & Hypervisor (cont.) www.software.intel.co m Xen, VMWare ESX Bare Metal / Native Hypervisor VMWare Workstation Hosted Hypervisor Which type of Hypervisor is better?
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KVM/ARM: The Design and Implementation of the Linux ARM Hypervisor ARM Linux KernelHypervisor (KVM) QEMU Guest OS Apps QEMU Guest OS Apps QEMU Guest OS Apps QEMU Guest OS Apps Full Virtualization
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Prior ARMV7 Cannot Emulate Trap & Emulate Not Classically Virtualizable
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ARM V7 Virtualization Extension Trap & Emulate
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CPU Virtualization From Hyp Mode, hardware Configurable to trap sensitive instructions and interrupt to Hyp Mode Hardware Configurable to trap sensitive instructions and interrupt directly to VM's Kernel mode Trap Why trapping at Kernel Mode is useful?
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CPU Virtualization Hypervisor should be lightweight and simple to program Reduced Number of Control Registers Page tables entries is protected from user mode, as they should not be shared with user mode Hyp mode has its own separate address space
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Memory Virtualization http://www.cs.columbia.edu/~cdall/pubs/KVMARM_talk.pdf Hardware support to virtualize physical memory: Stage 2 Page Tables Enabled/Disabled from Hyp Mode
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Interrupt Virtualization Generic Interrupt Controller http://infocenter.arm.com / Configures GIC Send ACK & EOI(End-of- interrupt)
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Interrupt Virtualization Generic Interrupt Controller http://infocenter.arm.com / Cumbersome & Expensive Trapping Interrupt in Hyp Mode Hardware Hypervisor 1) Interrupt 2) Trap VM 3) Emulate Virtual Interrupt By signal
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Interrupt Virtualization Generic Interrupt Controller (V2.0) http://infocenter.arm.com / Virtual GIC Virtual CPU Interfaces But No Virtual Distributor Why Virtual Distributor is required?
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Interrupt Virtualization Generic Interrupt Controller (V2.0) http://infocenter.arm.com / Virtual GIC Trapping Interrupt in Kernel Mode Virtual Hardware Hypervisor 1) Interrupt 2) Trap VM
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Timer Virtualization Generic Timer support http://infocenter.arm.com / ARM introduces Virtual Timer and Counter But requires Timer operations to be performed by Hyp CPU 0 Counter Timer 0 CPU 1Timer 1 CPU 2Timer 2 CPU 3Timer 3 Can be configured from Hyp Mode
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Timer Virtualization Generic and Virtualized Timer support CPU 0 Counter Timer 0 Virtual CPU 0 Virtual Timer 0 CPU 1Timer 1 Virtual CPU 1 Virtual Timer 1 CPU 2Timer 2 Virtual CPU 2 Virtual Timer 2 CPU 3Timer 3 Virtual CPU 3 Virtual Timer 3 Virtual Counter Accessible from Hyp mode Accessible from VMs Why Virtual Timer support is required?
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Hypervisor Architecture Linux Kernel KVM Firstly, Linux is written to work in kernel mode and would not run unmodified in Hyp Mode Secondly, Running entire kernel in Hyp Mode would adversely affect native performance Hyp mode has its own separate address space. This requires explicitly map user space data while accessing user space memory Some registers and table formats are different in Hyp mode than in kernel mode
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Hypervisor Architecture Split-Mode Virtualization Linux Kernel KVM http://www.cs.columbia.edu/~cdall/pubs/KVMARM_talk.pdf
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Hypervisor Architecture Split-Mode Virtualization Handles High level Functionality Handles Low Level Functionality http://www.cs.columbia.edu/~cdall/pubs/KVMARM_talk.pdf
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Hypervisor Architecture Split-Mode Virtualization http://www.cs.columbia.edu/~cdall/pubs/KVMARM_talk.pdf
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Hypervisor Architecture Split-Mode Virtualization Store GP regs, host config Configure VGIC, Virtual Timer, Traps, stage2 pagetable regs Restore Guest GP regs, VM config
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Hypervisor Architecture Split-Mode Virtualization Lowvisor creates correct execution context by configuring hardware
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Hypervisor Architecture Split-Mode Virtualization http://www.cs.columbia.edu/~cdall/pubs/KVMARM_talk.pdf
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Hypervisor Architecture Split-Mode Virtualization Lowvisor: Handles Interrupts and Exceptions
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Hypervisor Architecture Split-Mode Virtualization http://www.cs.columbia.edu/~cdall/pubs/KVMARM_talk.pdf
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Hypervisor Architecture What are the Functionalities of LowVisor? Trap handler: Handles Interrupt and Exception Set Correct Execution context by configuring hardware Perform Context Switch between Host and VM execution context
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Hypervisor Architecture Perform Context Switch between Host and VM execution context Host Execution Context Virtual Execution Context
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CPU Virtualization Perform Context Switch between Host and VM execution context
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CPU Virtualization Perform Context Switch between Host and VM execution context
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Memory Virtualization Configuring page tables is a high level Functionality http://www.cs.columbia.edu/~cdall/pubs/KVMARM_talk.pdf
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Memory Virtualization But LowVisor has hardware access as it runs in Hyp Mode
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Memory Virtualization Page Fault get_user_pages() http://www.cs.columbia.edu/~cdall/pubs/KVMARM_talk.pdf
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Interrupt Virtualization http://www.cs.columbia.edu/~cdall/pubs/KVMARM_talk.pdf
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Interrupt Virtualization http://www.cs.columbia.edu/~cdall/pubs/KVMARM_talk.pdf
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Interrupt Virtualization KVM/ARM implements virtual GIC Distributor in software What happens when a virtual interrupt occurs?
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Timer Virtualization http://www.cs.columbia.edu/~cdall/pubs/KVMARM_talk.pdf
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Timer Virtualization http://www.cs.columbia.edu/~cdall/pubs/KVMARM_talk.pdf
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Timer Virtualization Virtual timers cannot directly raise virtual interrupts, but always raise hardware interrupts
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Implementation & Experimental Setup http://www.cs.columbia.edu/~cdall/pubs/KVMARM_talk.pdf
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Implementation & Experimental Setup http://www.cs.columbia.edu/~cdall/pubs/KVMARM_talk.pdf
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Performance on Micro Benchmark Two world switches Cost of saving and restoring VGIC states hardware support to save and restore state
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Performance on Micro Benchmark Switching the hardware mode Manipulate two registers to trap hardware supported save and restore state
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Performance on Micro Benchmark cost of an I/O operation from the VM to a device saving and restoring VGIC hardware supported save and restore state x86 KVM saves and restores additional state lazily
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Performance on Micro Benchmark cost of Inter-processor Interrupt Hardware supported VGIC EOI/ACK must be handled in Root mode in x86
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Recommendation to Hardware Designers Share Kernel Mode Memory Model in Hyp Mode - Current implementation is different and require extra effort for memory management Make VGIC state access fast, or at least infrequent - Cause overhead because of slow MMIO access. Summary registers describing virtual interrupt state could be an improvement Completely avoid IPI traps - As Virtual Distributors are implemented in software, this cause some overhead.
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Summary KVM/ARM was the first system to run unmodified guests on hardware Facilitated by split-mode virtualization Comparison with KVM
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Questions?
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