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Parallel Processing Group Members: PJ Kulick Jon Robb Brian Tobin.

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Presentation on theme: "Parallel Processing Group Members: PJ Kulick Jon Robb Brian Tobin."— Presentation transcript:

1 Parallel Processing Group Members: PJ Kulick Jon Robb Brian Tobin

2 Topics Theory of parallel computers SUPERCOMPUTERS Distributed Computing

3 Parallelism is the process of performing tasks concurrently. What is parallelism??? Real life examples: Definition A pack of wolves hunting its prey. An orchestra.

4 Flynn’s Hardware Taxonomy Processor Organizations Single instruction, single data (SISD) stream Multiple instruction, single data (MISD) stream Single instruction, multiple data (SIMD) stream Multiple instruction, multiple data (MIMD) stream Uniprocessor Vector processor Array processor Shared memory Distributed memory Symmetric multiprocessor (SMP) Nonuniform memory access (NUMA) Clusters

5 Taxonomy of parallel computing paradigms Parallel Computer SynchronousAsynchronous Vector/Array SIMD Systolic MIMD

6 Interconnection Networks(IN) IN topology Distributed MemoryShared Memory StaticDynamic 1-dimensional 2-dimensional Hypercube Single-stage Multi-stage Cross-bar Vector MIMD

7 Distributed Memory – Static Networks Linear array (1-d) 2-dimensional networks ring star tree mesh

8 Distributed Memory – Static Networks (cont’d) Fully connected network

9 Hypercube

10 Distributed Memory Dynamic configurations single-stage multi-stage cross-bar

11 Deep Blue First computer to defeat a world chess champion 32-node IBM Power Parallel SP2 6-move look ahead capability

12 SP2 Architecture “The IBM SP2 is a general-purpose scalable parallel system based on a distributed memory message passing architecture.” 2 to 128 nodes POWER2 technology RISC System/6000 processor

13 SP2 Architecture

14

15 Super Computers – “Real World” RISC System technology Running a high-volume scalable WWW server Forecasting the weather Designing cars Compaq AlphaServer technology Human Genome Project

16 Sun Systems MAJC Chip

17 MAJC Implements parallel processing on one chip Can operate in standalone or with up to several hundred others in parallel First version contains two separate processors As time goes many more will be included on one chip

18 Features Four function units per processor Each function unit contains local registers Global registers can be accessed by all FU’s Operates as SIMD Multiple function units allow multiple instructions to be done simultaneously Each function unit can act as RISC/DSP processor itself

19 Architecture

20 Instruction Word

21 SGI Onyx 3000

22 Onyx 3000 Series Developed for visualization and supercomputing Modular design allows for scalability ease Snap together approach Growth in multiple dimensions NUMAFlex architecture Designed for different generations to work together

23 Road Map

24 Available configurations

25 Applications of Onyx 3000 High speed processing Real time graphic to video High-definition editing Integral support for virtual reality, real- time six degrees of freedom (6DOF) interaction, and sensory immersion

26 Real World Example The Cave(Iowa State University) Recreation of Forbidden City John Dear Factory Molecular Structuring

27 References http://www.sun.com http://www.sgi.com http://www.ibm.com http://www.vrac.iastate.edu Stallings, Williams. Computer Organization and Architecture,5 th Edition.Upper Saddle River, New Jersey: Prentice Hall 2000 Lewis, Ted G. Introduction to Parallel Computing. Englewood Cliffs, New Jersey: Prentice Hall 1992 Kumar, Vippin. Introduction to Parallel Computing. Redwood City,California: The Benjamin/Cummings Publishing Company 1994 Moldovan,Dan I. Parallel Processing: From Applications to Systems. San Mateo, California: Morgan Kaufmann 1993


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