1. 1 Answers to Test 2, Question 1 The functions receives the radius and height of a cylinder (גליל) and returns its volume (נפח). const float PI=3.14 float cyl_vol(float r, float h) { return(r*r*h*PI); }

2. 2 Question 2 Result a (CarryIn (0 if addition 1 if subtraction CarryOut 0 1 Operation b Result a CarryIn CarryOut 0 1 Operation b

3. 3 Question 3 ET A = 324M * 2.5 * 2ns = 1620M ns = 1.62 sec ET B = 290M *3.2 *(1/550M)ns = 1687M ns = 1.687s A is faster than B by 4% (1687/1620) Computer A: FE=1.00 (all the instructions are effected), SE = 2/1.8 = 1.11. (1.00/1.11 + 1 -1)*1.62 = 1.458 sec Computer B: FE=0.50, SE=3.2/2.1 = 1.52 (0.50/1.52 + 0.50)*1.687 = 1.398 sec Now B is faster than A by 4%

4. 4 Question 4 mov $t0,$t1 -> add $t0,$t1,$zero bgt $t0,$t1,L1 -> slt $t2,$t1,$t0 bne $t2,$zero,L1 seq $t0,$s1,$s2 -> bne $s1,$s2,L1 addi $t0,$zero,1 j L2 L1: addi $t0,$zero,0 L2: div $t0,$t1,$t2 -> div $t1,$t2 mflo $t0

5. 5 Question 5 Register $s0 contains 0111 1111 1111 1111 1111 1111 1111 1111 Register $s1 contains 1000 0000 0000 0000 0000 0000 0000 0001 slt $t0,$s0,$s1 compares 2 signed numbers. $s0 contains 2 31 -1 and $s1 contains -2 31 -1. 2 31 -1 > - 2 31 -1 so $t0 equals 0. sltu $t1,$s0,$s1 compares 2 unsigned numbers. $s0 contains 2 31 -1 and $s1 contains 2 31 +1. 2 32 -1 < 2 31 +1 so $t1 equals 1. 0x80000000 = 2147483648 so both $t0 and $t1 will contain 0.

6. 6 Question 6 16KB=2 14, thus 14 address lines are needed. The width of the SRAM is 4 bits, so 4 input lines and 4 output lines are needed. 2MB = 2 21, thus 21 address lines, 1 data input line, and 1 data output line are needed. To read 4 words takes 1 + 4*12 + 4*2 = 57 cycles If memory is interleaved in 2 banks we can read each 2 words in parallel, although we will have to still send them one at a time. So to read 4 words now takes 1 + 2*12 + 4*2 = 33 cycles.

7. 7 Question 7 sum: subi $sp,$sp,8 # make room for 2 items sw $ra,4($sp)# push the return address sw $a0,0($sp)# push the argument n slt $t0,$a0,1 # test for n<1 beq $t0,$zero,L1 # if n>=1 goto L1 li $v0,0 # pseudoinstruction $v0=0 addi $sp,$sp,8 # pop 2 items off stack jr $ra The following is the recursive call to sum(n-1) L1: subi $a0,$a0,1 # n-- jal sum # call sum(n-1) lw $a0,0($sp) # return from fact(n-1) lw $ra,4($sp) # pop n and return address addi $sp,$sp,8 # pop 2 items off stack add $v0,$a0,$v0 # return n + sum(n-1) jr $ra

8. 8 Question 8 What is reduced is the number of bits for the opcode, this reduces the number of possible instructions. RISC processors have instructions that are the same length (1 word) as opposed to GPRs that have variable length instructions. RISC processors have 3 operand instructions as opposed to 2 operand instructions. RISC processors access memory only through Load/Store instructions, as opposed to GPRs where all instructions (even ALU instructions) can have memory operands. RISC programs might have more instructions.