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Fast Packet Classification Using Bit Compression with Fast Boolean Expansion Author: Chien Chen, Chia-Jen Hsu and Chi-Chia Huang Publisher: Journal of.

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Presentation on theme: "Fast Packet Classification Using Bit Compression with Fast Boolean Expansion Author: Chien Chen, Chia-Jen Hsu and Chi-Chia Huang Publisher: Journal of."— Presentation transcript:

1 Fast Packet Classification Using Bit Compression with Fast Boolean Expansion Author: Chien Chen, Chia-Jen Hsu and Chi-Chia Huang Publisher: Journal of Information Science and Engineering, 2007 Presenter: Chun-Yi Li Date: 2009/03/11

2 2 Outline  Related Work Bitmap intersection Aggregated Bit Vector (ABV)  Bit Compression Algorithm  Fast Boolean Expasion  Performance

3 3 Bitmap intersection  Each interval associated with an N-bits bit vector. 0 0 0 0 0 0 1 0 0 0 1 0 1 1 0 0 1 0 1 1 1 0 0 0 1 1 1 0 0 1 1 0 1 0 0 1 1 0 0 0 0 1 1 0 0 1 0 1 0 0 0 0 0 0 1 2 3 4 5 6 R1 R2 R3 R6 R4 R5 Related Work

4 Aggregated Bit Vector (ABV) 0000 1110 000 1100 1110 000 0010 0001 101 0001 0001 110 0000 0001 100 010 110 111 011 0000 0010 110 1000 0010 110 0001 1000 001 0010 0100 000 011 111 110 0100 0011 110 111 1 1 1 1 0 0 0 0 0 0 1 Field 1 Field 2 Rule Field1Field2 R000* R100*01* R210*11* R311*10* R40*10* R50*11* R60* R71*01* R81*0* R911*0* R1010* Related Work Aggregate size = 4

5 5 Aggregated Bit Vector (ABV)  Aggregation tries to decrease the memory access time by adding ABV.  Generates false matching. - Rule rearrangement.  Faster than bitmap intersection, but use more space. Related Work

6 1110 0000 000 1111 1000 000 0000 0111 100 0000 0110 011 0000 0110 000 100 110 011001 010 1000 0100 010 1001 0100 010 0100 0001 001 0010 0000 100 011 111 101 1000 1110 010 111 1 1 1 1 0 0 0 0 0 0 1 Field 1 Field 2 RuleField1Field2 R00* R10*10* R20*11* R300* R400*01* R51*0* R61*01* R710* R810*11* R911*0* R1011*10* Related Work Aggregated Bit Vector (ABV)

7 7 Outline  Related Work Bitmap intersection Aggregated Bit Vector (ABV)  Bit Compression Algorithm  Fast Boolean Expasion  Performance

8 8 Bit Compression Algorithm  Memory storage - θ(dN ㏒ N)  Require additional time for decompression

9 9 000000000011 Don’t Care Vectors (DCV) Bit Compression Algorithm Removing the redundant “1” bits Construct Don’t Care Vectors (DCV)

10 10 Removing redundant ‘0’ bits Bit Compression Algorithm

11 11 For convience of memory access, fill up ‘0’ to the end of the CBVs and index table. Bit Compression Algorithm Append “index table lookup address” (ITLA) Construct Compressed Bit Vector(CBV)

12 12 Index table 0013400 0112568 1012700 11910000 Filled up with ‘0’ Bit Compression Algorithm Construct index table

13 13 Bit Compression Algorithm Search (DCV)

14 14 Maxmum Overlap Analysis β – denote the probability that P A is a prefix of P B. (P A and P B are randomly selected from the rule table) Bit Compression Algorithm

15 15 Region Segmentation The region segmentation algorithm constructs an undirected graph first. Each vertex v i corresponds to a rule R i, and an edge is constructed between v i and v j if rules i and j are dependent.

16 16 Region Segmentation STEP1: C 1 {1, 2, 3, 4, 5, 6, 7, 8} C 2 {9, 10} STEP2: C 11 {1, 3, 4} C 12 {1, 2, 5, 6, 7, 8} C 2 {9, 10} STEP3: C 11 {1, 3, 4} C 121 {1, 2, 5, 6, 8} C 122 {1, 2, 6, 7} C 2 {9, 10} 1.Find connected component. 2.Remove maximum degree vectex if set smaller than maximum overlap. Maximum overlap = 5

17 17 Merge Rule Set CR 1 {1, 3, 4} CR 2 {1, 2, 5, 6, 8} CR 3 {1, 2, 6, 7} CR 4 {9, 10} Merge CR 1 {1, 3, 4. 9, 10} CR 2 {1, 2, 5, 6, 8} CR 3 {1, 2, 6, 7} Index table 0013400 0112568 1012670 11910000 New index table 00134910 0112568 1012670 Two rule sets can be merged together if the rule numbers of the merged rule sets are smaller than or equal to the maximum overlap.

18 18 Merge Rule Set New index table 00134910 0112568 1012670

19 19 Merge Rule Set

20 20 Outline  Related Work Bitmap intersection Aggregated Bit Vector (ABV)  Bit Compression Algorithm  Fast Boolean Expasion  Performance

21 21 Fast Boolean Expasion(FBE)  Original boolean expression: (CBV S +DCV S )*(CBV D +DCV D )  Modify boolean expression: (CBV S *CBV D )+(CBV S *DCV D )+ (DCV S *CBV D )+(DCV S *DCV D ) Takes few memory accesses since CBV S and CBV D are compressed bit vector. Only extract the essential bits from DCV that are corresponding to the set bits of CBV D efault rule

22 22 Outline  Related Work Bitmap intersection Aggregated Bit Vector (ABV)  Bit Compression Algorithm  Fast Boolean Expasion  Performance

23 23 Performance

24 24 Performance

25 25 Performance Transmission rate Without wildcard rule (K)

26 26 Performance Transmission rate Contain 20% wildcard rule (K)

27 27 Transmission rate Contain 50% wildcard rule Performance (K)


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