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Chapter 2. 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 0 0 0 0 1 1 0 0 1 1 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 1+ 1- 2+ 3+

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Presentation on theme: "Chapter 2. 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 0 0 0 0 1 1 0 0 1 1 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 1+ 1- 2+ 3+"— Presentation transcript:

1 Chapter 2

2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 0 0 0 0 1 1 0 0 1 1 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 1+ 1- 2+ 3+ 4+ 5+ 6+ 7+ 2- 3- 4- 5- 6- 7- 8- 0+ 0- 1+ 2+ 3+ 4+ 5+ 6+ 7+ 0+ 7- 6- 5- 4- 3- 2- 1- 0- 1+ 2+ 3+ 4+ 5+ 6+ 7+ 0+ 7- 6- 5- 4- 3- 2- 1- b 3 b 2 b 1 b 0 Sign and magnitude 1's complement2's complement BValues represented Figure 2.1. Binary, signed-integer representations.

3 second word first word Figure 2.5. Memory words. n bits last word i th word

4 Figure 2.6. Examples of encoded information in a 32-bit word. (b) Four characters character (a) A signed integer Sign bit: for positive numbers for negative numbers ASCII 32 bits 8 bits b 31 b 30 b 1 b 0 b 31 0= b 1=

5 2 k 4-2 k 3-2 k 2-2 k 1-2 k 4-2 k 4- 0123 4567 0 0 4 2 k 1-2 k 2-2 k 3-2 k 4- 3210 7654 Byte address (a) Big-endian assignment(b) Little-endian assignment 4 Word address Figure 2.7. Byte and word addressing.

6 Register Transfer Notation [ ] means “content of” [R2] means “content of register R2” [A] means “content of memory location A” means “transfer content” R1 [R2] means “transfer content of register R2 to register R1”

7 Register Transfer Notation R1 [LOC] Transfer the content of memory location LOC to register R1 R3 [R1] + [R2] Sum the contents of registers R1 and R2 and transfer the result to R3

8 Assembly Language Notation MOVE LOC, R1 ADD R1, R2 SUB R1, R2, R3 –Mnemonic op codes –Symbolic addresses

9 R0, C B, R0 A, R0 Move i + 8 Begin execution here Move i Contents Address C B A the program Data for segment program 3-instruction Add i + 4 Figure 2.8. A program for C  + 

10 NUMn NUM2 NUM1 R0,SUM NUMn,R0 NUM3,R0 NUM2,R0 NUM1,R0 Figure 2.9. A straight-line program for adding n numbers. Add Move SUM i Move Add i 4n + i 4n4-+ i8+ i4+ n-1 ADD instructions

11 N,R1Move NUMn NUM2 NUM1 R0,SUM R1 "Next" number to R0 Figure 2.10. Using a loop to add n numbers. LOOP Decrement Move LOOP loop Program Determine address of "Next" number and add N SUM n R0Clear Branch>0 N times

12 Table 2.1 Generic addressing modes Name Assembler syntax Addressing function Immediate #Value Operand = Value Register RiEA = Ri Absolute (Direct) LOC EA = LOC Indirect (Ri) EA = [Ri ] (LOC) EA = [LOC] Index X(Ri) EA = [Ri ] + X Base with index (Ri,R j) EA = [Ri ] + [R j ] Base with index X(Ri,R j) EA = [Ri ] + [R j ] + X and offset Relative X(PC) EA = [PC] + X Autoincrement (Ri )+ EA = [Ri ]; Increment Ri Autodecrement −(Ri ) Decrement Ri ; EA = [Ri ] EA = effective addressValue = a signed number

13 Immediate Addressing Operand is part of the instruction Operand is in the address field Example: ADD 17 – Add 17 to the contents of the accumulator – 17 is the operand

14 OP CODE OPERAND Instruction word: ADD 17 No memory reference to fetch the data Fast Limited range of values

15 OP CODE Address Direct Addressing (Register) Registers Operand INC R4 R0 R1 R2 R3 R4 R5

16 OP CODE Address Direct Addressing (Absolute) Memory Operand ADD LOC

17 R1 Add (R1), R0 Add (A), R0 Figure 2.11. Indirect addressing. Register BB Operand memory Main (a) Through a general-purpose register(b) Through a memory location ABOperandB

18 ClearR0 Contents Move Add Decrement Add LOOP Initialization LOOP Address Figure 2.12. Use of indirect addressing in the program of Figure 2.10. (R2), R0 #4, R2 R1 R0,SUM Move N,R1 #NUM1, R2 Branch > 0 Add N numbers starting with NUM1

19 Operand1020 Figure 2.13. Indexed addressing. Add 1000(R1),R2 R1 Add 20(R1),R2 Operand1020 201000 20 = offset 1000 (a) Offset is given as a constant (b) Offset is in the index register see next

20 1020 Figure 2.13. Indexed addressing. R1 Add 20(R1), R2 20 = offset 1000 (a) Offset is given as a constant Operand base address index: 0,4,8,16,20,etc.

21 1020 Figure 2.13. Indexed addressing. R1 Add 1000(R1), R2 20 = offset 20 1000 (a) Offset is in the register Operand base address index: 0,4,8,16,20,etc.

22 Figure 2.14. A list of students' grades. Student 1 Student 2 Test 3 Test 2 Test 1 Student ID Test 3 Test 2 Student ID n N LIST Test 1LIST + 4 LIST + 8 LIST + 12 LIST + 16

23 Move #LIST, R0 Add Move Add 12(R0), R3 LOOP Figure 2.15. Indexed addressing used in accessing test scores in the list in Figure 2.14. #16, R0 ClearR1 ClearR3 4(R0), R1 ClearR2 Add8(R0), R2 N,R4 DecrementR4 LOOP MoveR1, SUM1 Move R2, SUM2 MoveR3, SUM3 Branch > 0 Add ;base of array ;number of students ;first test score ;second ;third ;accumulator for T1 ;accumulator for T2 ;accumulator for T3 ;next student ;decrement count

24 R0Clear R0,SUM R1 (R2)+, R0 Figure 2.16. The Autoincrement addressing mode used in the program of Figure 2.12. Initialization Move LOOPAdd Decrement LOOP #NUM1, R2 N, R1Move Branch>0 Add N numbers starting with NUM1

25 NUM2 NUMn NUM1 R0Clear R0,SUM R1 #4,R2 (R2),R0 Figure 2.17. Memory arrangement for the program in Figure 2.12. 100 132 604 212 208 204 200 128 124 120 116 112 108 104 100 SUM N LOOP Decrement Add Move #NUM1,R2 N,R1Move Branch>0 the list (array) of numbers the program accumulator for sum length of list

26 Table 2.1 Generic addressing modes Name Assembler syntax Addressing function Immediate #Value Operand = Value Register RiEA = Ri Absolute (Direct) LOC EA = LOC Indirect (Ri) EA = [Ri ] (LOC) EA = [LOC] Index X(Ri) EA = [Ri ] + X Base with index (Ri,R j) EA = [Ri ] + [R j ] Base with index X(Ri,R j) EA = [Ri ] + [R j ] + X and offset Relative X(PC) EA = [PC] + X Autoincrement (Ri )+ EA = [Ri ]; Increment Ri Autodecrement −(Ri ) Decrement Ri ; EA = [Ri ] EA = effective addressValue = a signed number

27 MemoryAddressing addressordata labelOperationinformation SUMEQU200 ORIGIN204 NDATAWORD100 NUM1RESERVE400 ORIGIN100 STARTMOVEN,R1 MOVE#NUM1, R2 CLRR0 LOOPADD(R2), R0 ADD#4, R2 DECR1 BGTZLOOP MOVER0, SUM RETURN ENDSTART Figure 2.18. Assembly language representation for the program in Figure 2.17. assembler directives statements that generate machine instructions

28 The Assembler (first pass) Read the AL program file, processing the directives and locating all of the labels Assign addresses to instructions and data Build a symbol table containing all of the names (labels) and their corresponding values (addresses)

29 Symbol table for the example: SUM200 from the EQU directive N204 from the ORIGIN directive NUM1208 counting from ORIGIN START100 from 2 nd ORIGIN LOOP112 counting from ORIGIN

30 The Assembler (second pass) Read the AL program file again Replace all mnemonic op codes with their binary code values Replace all symbolic addresses (labels) with their numeric value Generate a code file with the machine language program

31 DATAIN SIN Keyboard Processor Bus Figure 2.19 Bus connection for processor, keyboard, and display DATOUT SOUT Display

32 DATAIN SIN Keyboard Processor Bus Figure 2.19 Bus connection for processor, keyboard, and display DATOUT SOUT Display buffers flags

33 DATAIN SIN Keyboard Processor Bus keystroke puts character in DATAIN, sets flag SIN to 1 to indicate to processor that character can be read Program: READWAITBranch to READWAIT if SIN = 0 ;wait for keystroke Input content of DATAIN to R1

34 Processor Bus DATOUT SOUT Display display sets flag SOUT to 1 to indicate to processor that it is ready to receive a character Program: WRITEWAITBranch to WRITEWAIT if SOUT = 0 ;wait for display Output content of R1 to DATAOUT

35 READWAITBranch to READWAIT if SIN = 0 Input content of DATAIN to R1 WRITEWAITBranch to WRITEWAIT if SOUT = 0 Output content of R1 to DATAOUT “busy wait” What the CPU Must Do

36 READWAITTestbit#3, INSTATUS Branch=0READWAIT MoveByteDATAIN, R1 WRITEWAITTestbit#3, OUTSTATUS Branch=0WRITEWAIT MoveByteR1, DATAOUT Assembler Language Instructions device status registers

37 Move #LOC, R0 Initialize pointer to register R0 to point to the address of the first location in memory where the characters are to be stored READTestBit #3, INSTATUS Wait for a character to be entered in the Branch=0 READ keyboard buffer DATAIN MoveByte DATAIN, (R0) Transfer the character from DATAIN into the memory (this clears SIN to 0) ECHOTestBit #3, OUTSTATUS Wait for the display to become ready Branch=0 ECHO MoveByte (R0), DATAOUT Move the character just read to the display buffer register (this clears SOUT to 0) Compare #CR, (R0)+ Check if the character just read is CR (carriage return). If it is not CR, then Branch= READ branch back and read another character and also increment the pointer to store the next character Figure 2.20. A program that reads a line of characters and displays it.

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41 Calling program Move N, R1 R1 serves as a counter. Move #NUM1, R2 R2 points to the list. Call LISTADD Call subroutine. Move R0, SUM Save result.. Subroutine LISTADD Clear R0 Initialize sum to 0. LOOP Add (R2)+, R0 Add entry from list. Decrement R1 Branch>0 LOOP Return Return to calling program. Figure 2.25 Program of Figure 2.16 written as a subroutine; parameters passed through registers.

42 Figure 2.26. Program of Figure 2.16 written as a subroutine; parameters passed on the stack. Assume top of stack is at level 1 below. Move #NUM1,−(SP) Push parameters onto stack. Move N,−(SP) Call LISTADD Call subroutine (top of stack at level 2). Move 4(SP),SUM Save result. Add #8,SP Restore top of stack (top of stack at level 1).. LISTADD MoveMultiple R0−R2,−(SP) Save registers (top of stack at level 3). Move 16(SP),R1 Initialize counter to n. Move 20(SP),R2 Initialize pointer to the list. Clear R0 Initialize sum to 0. LOOP Add (R2)+,R0 Add entry from list. Decrement R1 Branch>0 LOOP Move R0,20(SP) Put result on the stack. MoveMultiple (SP)+,R0−R2 Restore registers. Return Return to calling program.

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45 Memory location Instructions Comments Main program. 2000 Move PARAM2, −(SP) Place parameters on stack. 2004 Move PARAM1, −(SP) 2008 Call SUB1 2012 Move (SP), RESULT Store result. 2016 Add #8, SP Restore stack level. 2020 next instruction. First subroutine 2100 SUB1 Move FP, −(SP) Save frame pointer register. 2104 Move SP,FP Load the frame pointer. 2108 MoveMultiple R0−R3,−(SP) Save registers. 2112 Move 8(FP), R0 Get first parameter. Move 12(FP), R1 Get second parameter.. Move PARAM3, −(SP) Place a parameter on stack. 2160 Call SUB2 2164 Move (SP)+, R2 Pop SUB2 result into R2.. Move R3, 8(FP) Place answer on stack. MoveMultiple (SP)+, R0−R3 Restore registers. Move (SP)+, FP Restore frame pointer register. Return Return to Main program. Second subroutine 3000 SUB2 Move FP,−(SP) Save frame pointer register. Move SP,FP Load the frame pointer. MoveMultiple R0−R1,−(SP) Save registers R0 and R1. Move 8(FP),R0 Get the parameter.. Move R1,8(FP) Place SUB2 result on stack. MoveMultiple (SP)+,R0−R1 Restore registers R0 and R1. Move (SP)+,FP Restore frame pointer register. Return Return to Subroutine 1. Figure 2.28 Nested subroutines.

46 Memory location Instructions Comments Main program. 2000 Move PARAM2, −(SP) Place parameters on stack. 2004 Move PARAM1, −(SP) 2008 Call SUB1 2012 Move (SP), RESULT Store result. 2016 Add #8, SP Restore stack level. 2020 next instruction. Figure 2.28 Nested subroutines.

47 Memory location Instructions Comments First subroutine 2100 SUB1 Move FP, −(SP) Save frame pointer register. 2104 Move SP,FP Load the frame pointer. 2108 MoveMultiple R0−R3, −(SP) Save registers. 2112 Move 8(FP), R0 Get first parameter. Move 12(FP), R1 Get second parameter.. Move PARAM3, −(SP) Place a parameter on stack. 2160 Call SUB2 2164 Move (SP)+, R2 Pop SUB2 result into R2.. Move R3, 8(FP) Place answer on stack. MoveMultiple (SP)+, R0−R3 Restore registers. Move (SP)+, FP Restore frame pointer register. Return Return to Main program. Figure 2.28 Nested subroutines.

48 Memory location Instructions Comments Second subroutine 3000 SUB2 Move FP,−(SP) Save frame pointer register. Move SP,FP Load the frame pointer. MoveMultiple R0−R1,−(SP) Save registers R0 and R1. Move 8(FP),R0 Get the parameter.. Move R1,8(FP) Place SUB2 result on stack. MoveMultiple (SP)+,R0−R1 Restore registers R0 and R1. Move (SP)+,FP Restore frame pointer register. Return Return to Subroutine 1. Figure 2.28 Nested subroutines.

49 Figure 2.29. Stack frames for Figure 2.28. FP [FP] from SUB1 2164 Stack frame for first subroutine [R0] from Main param3 [R3] from Main [R2] from Main [R1] from Main Old TOS 2012 [FP] from Main param1 param2 [R0] from SUB1 [R1] from SUB1 Stack frame for second subroutine

50 Figure 2.30. Logical shift instructions. carry flag fill with zeros

51 Figure 2.30. Logical shift instructions. carry flag fill with zeros

52 Figure 2.30. Arithmetic shift instructions. carry flag retain the “sign bit”

53 Move#LOC, R0R0pointstodata. MoveByte(R0)+, R1LoadfirstbyteintoR1. LShiftL#4, R1Shiftleftby4bitpositions. MoveByte(R0), R2LoadsecondbyteintoR2. And#$F, R2Eliminatehigh-orderbits. OrR1, R2ConcatenatetheBCDdigits. MoveByteR2, PACKEDStoretheresult. Figure 2.31. A routine that packs two BCD digits. #$F: 00 …01111(28 leading zeros)

54 Figure 2.32. Rotate instructions. CR0 before: after: 0 1 000111... 11 10111001 (c) Rotate right without carryRotateR #2,R0 (a) Rotate left without carryRotateL #2,R0 CR0 before: after: 0 1 000111... 11 110... 10101 C before: after: 0 1 000111... 11 10111000 (d) Rotate right with carryRotateRC #2,R0 R0...... (b) Rotate left with carryRotateLC #2,R0 CR0 before: after: 0 1 000111... 11 110... 00101

55 Figure 2.32. Rotate instructions.

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57 OP code Figure 2.39. Encoding instructions into 32-bit words. SourceDestOther info 87710 (b) Two-word instruction Memory address/Immediate operand OP code (c) Three-operand instruction RiRjOther infoRk OP codeSourceDestOther info (a) One-word instruction


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