1. Fehlererkennung in SW David Rigler

2. Overview Types of errors detection Fault/Error classification Description of certain SW error detection techniques Evaluation (Coverage / Overhead) Conclusion

3. Failure Runtime Detection (in Software) Software Diversity / N-Version P. Defensive Programming  Assertions  Bound/Range checking Control Flow checking  Block Entry Exit Checking  Error Capturing Instructions  Advanced Techniques … Redundant Data/Code HW - Failures SW - Failures

4. Transient Hardware Error Classification Data Errors Code Errors  Type S1 Statements affecting data only  Type S2 Statements affecting the execution flow  Type E1 Errors changing operation (not control flow)  Type E2 Errors changing the Statement type (S1  S2)

5. Data Errors (Executable Assertions) Generic  Bound  Integrity For SW and HW Errors Non-Generic  Value Range  Approximate (False alarm)

6. Data Errors (systematic Data Redundancy) Rules  Duplicate every variable: x -> (x1 and x2)  Perform write operations on x1 and x2  Read operation on x -> check for consistency of x1 and x2

7. Data Errors (systematic Data Redundancy) Generic Approach  Use pre-processor on high level language Compiler optimisations may be a problem All (visible) single Bit Flip Errors in DATA Memory can be detected

8. Control Flow Errors Block Entry Exit Checking  Unique signatures for Basic Blocks  Assign at Entry  Compare at Exit Problems  Jumps within Block  Granularity  Jumps to unused Area

9. Control Flow Errors Duplicate Condition Checks

10. Control Flow Errors Error Capturing Instructions  Special or unused Instructions Trap, SWI, …  Spread over unused Memory Program Memory Data Memory  Call Error Handling Function

11. Control Flow Errors Watchdog Timer  Periodically reset timer  Take Action at specific timer value  Needs Support of Hardware Common in embedded Controllers  Detects infinite loop errors

12. Coverage Example 1 BEEC, Duplicate Condition Checks, Systematic Data Redundancy Simulated bit-flip errors in memory ~ 5x Performance slow down ~ 2x Size No Silent Violations (Data) High Coverage even for Errors in Code Area.

13. Coverage Example 2 Physical Fault Injection  Heavy-Ion Radiation  Power-Supply Disturbances Hardware WDT Effect of additional SW  60%  85%

14. Improving Coverage Separate BB for redundant variables Separated in Memory  No single bit-flip jumps Use cumulative Signatures  Detect jumps within Block Avoid Signature aliasing  Hamming distance

15. 100% Coverage For simple failure model  Single bit-flip  Data- and Code-Memory/Registers  Hidden Registers not included (Branch Buffer, Cache tags, etc) High Overhead  ~4x Memory usage  >3x Time

16. Conclusion: Error Detection in SW Pure SW: high coverage only for simple failure models Addition to HW Error Detection Trade-off: Overhead  Coverage  Fine tuning possible  Use available Resources (Time, Memory)

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