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® © 2003 Intel Corporation Silicon Photonics Applications Research Results & Integration Challenges Berkley Lecture Series: 4/27/04 Mario Paniccia, PhD.

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Presentation on theme: "® © 2003 Intel Corporation Silicon Photonics Applications Research Results & Integration Challenges Berkley Lecture Series: 4/27/04 Mario Paniccia, PhD."— Presentation transcript:

1 ® © 2003 Intel Corporation Silicon Photonics Applications Research Results & Integration Challenges Berkley Lecture Series: 4/27/04 Mario Paniccia, PhD. Director Photonics Technology Lab Intel Corporation

2 ® © 2003 Intel CorporationAcknowledgements: Drew Alduino, Sean Koehl, Richard Jones, Ansheng Liu, Ling Liao, Mike Morse, Mike Salib, Dean Samara-Rubio Oded Cohen, Doron Rubin, Assia Borkai

3 Communications Technology Lab © 2004 Intel Corporation 3 Outline  Microprocessor Performance Trends  Applications for optical  Interconnect Requirements  Silicon Photonics:  Recent Results  Integration challenges  Summary

4 Communications Technology Lab © 2004 Intel Corporation 4 Moore’s Law Scaling: 4004 8080 8086 8008 Pentium® Processor 486™ DX Processor 386™ Processor 286 Pentium® II Processor Pentium® III Processor Pentium® 4 Processor Itanium® 2 Processor 1,000 10,000 100,000 1,000,000 10,000,000 100,000,0001,000,000,00019701980199020002010 ~ 1Billion transistors by end of decade Microprocessor transistor count Source: Intel

5 Communications Technology Lab © 2004 Intel Corporation 5 Microprocessor Performance Microprocessor clock frequency trending to ~ 10GHz end of decade Microprocessor Clock Frequency 0.1 1 10 100 1,000 10,000 19701980199020002010 MHz Pentium® 4 Processor Pentium® III Processor Pentium® II Processor Pentium® Processor 486™ Processor 386™ Processor 286 8086 8085 8080 4004 Source: Intel

6 Communications Technology Lab © 2004 Intel Corporation 6 PC or “Datacom” Economics: MIPS Pentium ® Processor Pentium ® Pro Processor Pentium ® II Processor Pentium ® III Processor Pentium ® 4 Processor Intel386 TM DX Microprocessor Intel486 TM DX CPU Microprocessor 1 10 100 1000 10000 1985198919931995199719992001 MIPS$/MIPS 0.01 0.1 1 10 100 $/MIPS 19911987 Higher Performance, Lower Cost

7 Communications Technology Lab © 2004 Intel Corporation 7 Outline  Microprocessor Performance Trends  Applications for optical  Interconnect Requirements  Silicon Photonics:  Recent Results  Integration challenges  Summary

8 Communications Technology Lab © 2004 Intel Corporation 8 Chip to Chip 1 – 50 cm Board to Board 50 – 100 cm Copper (FR4) Communication Applications Shorter Distances 1 to 100 m Rack to Rack Copper/ FiberFiber 0.1 – 80 km SONET Fiber Channel Ethernet

9 Communications Technology Lab © 2004 Intel Corporation 9 Chip to Chip 1 – 50 cm Board to Board 50 – 100 cm Copper (FR4) Interconnect Applications Shorter Distances 1 to 100 m Rack to Rack Copper/ FiberFiber 0.1 – 80 km SONET Fiber Channel Ethernet

10 Communications Technology Lab © 2004 Intel Corporation 10 OPTICAL Electrical to Optical: Bandwidth vs Cost 20042010+ ELECTRICAL Enterprise Distance: 0.1- 10km Rack-Rack Distance: 1-100m Board-Board Distance: 50- 100cm Chip-Chip Distance: 1-50cm 3.125G 10G 40G 3.125G 5-6G 10G 20G 3.125G 5-6G 10G 15-20G Copper to optical transition is cost-driven 10G >= 40G Cu Technology (B/W) Optical Costs Transition Zone Silicon Photonics?

11 Communications Technology Lab © 2004 Intel Corporation 11 Outline  Microprocessor Performance Trends  Applications for optical  Interconnect Requirements  Silicon Photonics:  Recent Results  Integration challenges  Summary

12 Communications Technology Lab © 2004 Intel Corporation 12 Interconnect: Most Stringent Hard Drives PCI Express ATA CPU Front side bus * USB 2.0 Peripheral Devices LAN MCH Memory Controller Hub ICH I/O Controlle r Hub Memory AGP4X Monitor Memory bus * Graphics bus Computer Interconnect Estimated High Level costs Requirements for 2010+ : Data rates > 15 Gb/s per channel BER < 10^ -13 Voltage < 5 V Low power consumption ideally <100mW Distances <25 inches Cost/link < $5

13 Communications Technology Lab © 2004 Intel Corporation 13 Outline  Microprocessor Performance Trends  Applications for optical  Interconnect Requirements  Silicon Photonics:  Opportunity & Recent Results  Integration challenges  Summary

14 Communications Technology Lab © 2004 Intel Corporation 14 Opportunity for Silicon Photonics   Take advantage of enormous (billions $$) of silicon infrastructure and process learning   Most tools exist: Lithography requirements do not push leading edge (ie no 90nm litho)   Integration opportunity to combine multiple optical devices together (potential cost savings)   Can use Silicon as workbench to assist with packaging and alignment   Opportunity to converge communication and computing all on one platform.. Could provide PC like economics to Photonics However… many issues and challenges…

15 Communications Technology Lab © 2004 Intel Corporation 15 Laser Filter (adds tunability) Photo Receiver Modulator (improved encoding) DATA Optical Fiber 1 0 1 Elements of an Optical Link Receiver Transmitter + Transimpedance Amplifier (TIA) + Drive Electronics

16 Communications Technology Lab © 2004 Intel Corporation 16 1.Light Source 2.Guide Light 3.Fast Modulation 4.Light Detection 5.Low-cost Assembly 6.Intelligence Low-cost External Laser Si on Insulator (SOI) WG Si MOS Capacitor Device Si Based Photodetector Si Passive Alignment Si CMOS Circuitry REQUIREMENT OUR SOLUTION Requirements for “Siliconizing” Photonics

17 Communications Technology Lab © 2004 Intel Corporation 17 TIA TIADrivers CMOS Circuitry Vision: Integrated Photonic Chip Convergence of Communication and Computing Photodetector Passive Alignment Modulator ECL Filter Multiple Channels

18 Communications Technology Lab © 2004 Intel Corporation 18 2) Guide Light Wave- guides Tapers Splitters Switches, Couplers, & others 1) Light Source External Cavity Laser Light Source 4) Detect Light Photo-Detector Components for Siliconization 6) IntelligenceCMOS 3) Fast Modulation Silicon Modulator 5) Low Cost Assembly Passive Alignment

19 Communications Technology Lab © 2004 Intel Corporation 19 Photon Energy and Silicon Transparency Ultra Violet (UV) Visible Near IR Far IR Infra Red (IR) E=hc/ Intel Litho Photon Energy (eV)→ 2.76 1.55 1.1eV 0.41 Wavelength (µm) → 0.45 0.8 1.12µm 3.0 Silicon OpaqueSilicon Transparent Si Bandgap

20 Communications Technology Lab © 2004 Intel Corporation 20 Guiding Light with Si Waveguides Use silicon fabrication techniques to etch optical channels The light is confined in the top Si layer between oxide layers High index contrast (>2.5) allows for small bend radii Rib waveguide Silicon oxide SEM IMAGES Silicon oxide

21 Communications Technology Lab © 2004 Intel Corporation 21 2) Guide Light Wave- guides Tapers Splitters Switches, Couplers, & others 1) Light Source External Cavity Laser Light Source 4) Detect Light Photo-Detector Components for Siliconization 6) IntelligenceCMOS 3) Fast Modulation Silicon Modulator 5) Low Cost Assembly Passive Alignment

22 Communications Technology Lab © 2004 Intel Corporation 22 RESULTS: Modulator   Fast Modulators (>10GHz) exist, but use exotic materials   InP, Lithium Niobate etc   Fastest Si modulator to date was ~20MHz   Intel’s recent Research Breakthrough: Scalable 1GHz B/W silicon modulator   50 times faster than previous research attempts   Published in the journal Nature on Feb-12, 2004   Uses novel “transistor-like” phase shifting device   Simulations show this can scale to greater than 10GHz Eliminates a significant barrier to making Photonic Devices in Silicon

23 Communications Technology Lab © 2004 Intel Corporation 23 Modulator Concept Mach Zehnder Interferometer (MZI) Y coupler  /2 Silicon die MZI Converts Phase shift into amplitude modulation Optical Phase-Shifter Amplitude Modulated out CW in  /2

24 Communications Technology Lab © 2004 Intel Corporation 24 Novel Intel Capacitor Phase-shifter Device x-section is transistor-like & operates in accumulation mode Uses Majority carriers, so speed is determined by RC only R controlled by doping, C controlled by WG geometry and gate thickness Trade off in size reduction, doping, and speed oxide Silicon n-type Si + Gate Oxide p-type Polysilicon Oxide Silicon Oxide p-type Polysilicon

25 Communications Technology Lab © 2004 Intel Corporation 25 Results: Phase vs Voltage (Active L: SOI h=1.4um, Poly.9um, Gox=120A) Moving to 60A  Drive voltage can move to 3V  = 2  nL/ index  n  charge  N=  0  r /(et ox t)[V D -V FB ] V fb~ 1.2V Modeling Vfb Based on Plasma Optical Effect

26 Communications Technology Lab © 2004 Intel Corporation 26 Results: MZI-modulator   L = 16.7  m; 42nm FSR (testing convenience)  Optical Loss: Passive WG1.0dB/cm Phase-shifter5.1 dB/cm Small-signal measurementsLarge-signal modulator Phase shifters Light 1cm Light 2.5mm Phase shifter 6.7 dB on-chip loss

27 Communications Technology Lab © 2004 Intel Corporation 27 Small Signal Frequency Response Normalize 3 dB Rolloff ~2.5GHz Small signal response (.5V p-p ) Normalized frequency response

28 Communications Technology Lab © 2004 Intel Corporation 28 Large-signal Modulator  MZI has 1cm phase shifter in each arm  Cap. load requires parallel drive  Bank of 8 differential ECL buffers  1.6V pp  ~5.8dB ER expected PRBS Source  CW in via lensed fiber.  Polarization is controlled.  MZI biased to quadrature by tuning. (FSR ~ 42nm) 3mm + -  Light output collected w/ lensed fiber  DC-coupled 15GHz receiver

29 Communications Technology Lab © 2004 Intel Corporation 29 Modulation Result: 1Gb/s  Achieved 5dB RF extinction ratio  Clearly recoverable 1Gb/s PRBS pattern

30 Communications Technology Lab © 2004 Intel Corporation 30 2) Guide Light Wave- guides Tapers Splitters Switches, Couplers, & others 1) Light Source External Cavity Laser Light Source 4) Detect Light Photo-detector Components for Siliconization 6) IntelligenceCMOS 3) Fast Modulation Silicon Modulator 5) Low Cost Assembly Passive Alignment

31 Communications Technology Lab © 2004 Intel Corporation 31 Silicon-based Photodetectors Adding germanium to silicon pushes the onset of detection to longer wavelengths useful for data communication Silicon is a good detector for visible light (used in CCD cameras) silicon is transparent to infrared : need to change band gap Si Ge Silicon oxide Ge n-Si I p-Si

32 Communications Technology Lab © 2004 Intel Corporation 32 Previous Work on SiGe Photodetectors ReferenceStructureEfficiencyDark Current Luyri et al. Ge p-i-n  ex =40%@1.45  m50 mA/cm 2 Temkin et al.SiGe MQW pin  int =40%@1.3  m 7 mA/cm 2 Huang et al.SiGe MQW  ex = 1%@1.3  m60 mA/cm 2 Huang et al.SiGeC  ex = 1%@1.3  m 7 mA/cm 2 Shuppert et al.SiGe MQW pin  ex = 11%@1.3  m 1 mA/cm 2 Samavedam et al.Ge pn diode  ex = 13%@1.3  m0.15 mA/cm 2 Colace et al.Ge MSM  ex = 23%@1.3  m100 mA/cm 2 Li et al.SiGe MQW pin  ex = 1%@1.3  m no data Oh et al.Ge pin  ex = 49%@1.3  m400 mA/cm 2 Bauer et al.SiGe pin  ex = 1%@1.3  m 40 mA/cm 2 GoalSiGe pin waveguide  ex =50% @1.3  m 1 mA/cm 2 None of these have the desired performance and manufacturability to be commercially feasible.

33 Communications Technology Lab © 2004 Intel Corporation 33 Preliminary Photodetector Results 100Mb/s pseudo-random optical data detected at 1319nm Source: Intel Corporation

34 Communications Technology Lab © 2004 Intel Corporation 34 2) Guide Light Wave- guides Tapers Splitters Switches, Couplers, & others 1) Light Source External Cavity Laser Light Source 4) Detect Light Photo-detector Components for Siliconization 6) IntelligenceCMOS 3) Fast Modulation Silicon Modulator 5) Low Cost Assembly Passive Alignment

35 Communications Technology Lab © 2004 Intel Corporation 35 Low cost assembly: Passive Alignment FIBER WAVEGUIDE GROOVE Assembly is 1/3-2/3 the cost of optical components Active alignment means light on and optimizing power Complex, time consuming, expensive Passive Alignment uses lithographically + silicon to align Fiber Attach Laser Attach 45 deg facet

36 Communications Technology Lab © 2004 Intel Corporation 36 Etched Facet Etched Facet Develop a high quality waveguide facet etch (using a multi step etch recipe)Develop a high quality waveguide facet etch (using a multi step etch recipe) Deposit AR coating on Facet Deposit AR coating on Facet. Metallization Issues Develop a metallization process with high bond strengthDevelop a metallization process with high bond strength SOI Waveguide Silicon Substrate Challenges Laser Diode

37 Communications Technology Lab © 2004 Intel Corporation 37 Accomplishments Achievements:  Au electroplating developed for 2.5  m bump with good uniformity.  Successfully electroplated 5x10  m and 4x8  m bumps

38 Communications Technology Lab © 2004 Intel Corporation 38 First Bonding Results Mechanical die have been bonded to a patterned silicon wafer with 2.5  m thick electroplated Au bumps and sheared off 0.5 mm 1 mm 0.25 mm

39 Communications Technology Lab © 2004 Intel Corporation 39 First Passively Aligned Laser Diode Top View Output Waveguide Facet Laser diode Electrical Probe waveguide

40 Communications Technology Lab © 2004 Intel Corporation 40 Output Waveguide Facet Laser OFF Output Waveguide Facet with passively aligned LD Laser ON First Passively Aligned Laser Diode

41 Communications Technology Lab © 2004 Intel Corporation 41 Planar waveguide filters Filters  Bragg filters ~ 2mm long x 2.5um wide  Made from alternating polycrystalline silicon with crystalline silicon in waveguide (  n~0.01) narrow reflection band  70% reflectivity  20dB extinction ratio  Stop band 0.5 - 5nm  Thermally tunable 12-nm/100-C ECL  Used Bragg filters to wavelength stabilize external cavity laser  Showed POC single mode ECL  Tunability same as grating  Current researching SiON Bragg filters for temperature stable device Silicon / Poly silicon Bragg grating ~ 0.5nm reflection band Tuning of silicon based ECL with temperature Silicon Poly Silicon

42 Communications Technology Lab © 2004 Intel Corporation 42 Coupling to Planar waveguide devices Coupling loss  Solution to large coupling loss is to taper from large input waveguide to smaller bus waveguide  Showed decrease in coupling loss to 1.5dB/interface Taper from 8umx8um to 2.5umx2.5um THIS IS BIG CHALLENGE FOR SILICON PHOTONICS

43 Communications Technology Lab © 2004 Intel Corporation 43 TIA TIADrivers CMOS Circuitry Vision: Integrated Photonic Chips Convergence of Communication and Computing Photodetector Passive Alignment Modulator ECL Filter Multiple Channels

44 Communications Technology Lab © 2004 Intel Corporation 44 Integration Challenges w/CMOS Fabrication  Photonic Integration  Electronic (logic) & Photonic:

45 Communications Technology Lab © 2004 Intel Corporation 45 Integrated solution must perform better or lower cost than sum of discrete components Integration just for the sake of integration is not always good thing Integration: Photonic Only Monolithic integration of multiple optical devices has advantages: 1)Potential reduction in time and cost for testing vs hybrid 2)Litho alignment can reduce interface losses vs hybrid 3)Packaging of one die vs multiple devices 4)New form factor/functionality that discrete devices may not provide In the end though its all about balancing complexity vs yield

46 Communications Technology Lab © 2004 Intel Corporation 46 Integration: Photonic & Electronic 1) Process compatibility: @ 10Gb/s CMOS IC’s need 90nm technology. Silicon Photonic devices may only need ~.25um. 2) Yields: Typical industry IC yields are very high, but the process windows are extremely tight. Combining photonics and CMOS could exceed thermal budget, DOF, and other processing guidelines, thereby reducing IC yield. 3) Potential for performance improvement at very high speeds Size, form factor, power, performance & cost all factor into choosing Monolithic or Hybrid approach

47 Communications Technology Lab © 2004 Intel Corporation 47 Summary Silicon Photonics could provide opportunity bring PC economics to photonic industry Recent Results with silicon modulator have shown silicon to possibly be considered and optical material To be practical one must consider the integration challenges that will be encountered to produce these devices. In line wafer testing is big gap for HVM optical devices Electronic and photonic integration will be very challenging…

48 Communications Technology Lab © 2004 Intel Corporation 48 Optical Modulator References  Ansheng Liu, Richard Jones, Ling Liao, Dean Samara-Rubio, Doron Rubin, Oded Cohen, Remus Nicolaescu, and Mario Paniccia, A high-speed silicon optical modulator based on a metal–oxide–semiconductor capacitor, Nature 02/04  Tang, C. K. & Reed, G. T., Highly efficient optical phase modulator in SOI waveguides. Electron. Lett. 31, 451–452 (1995).  Dainesi, P. et al. CMOS compatible fully integrated Mach-Zehnder interferometer in SOI technology. IEEE Photon. Technol. Lett. 12, 660–662 (2000).  Irace, A., Breglio, G. & Cutolo, A. All-silicon optoelectronic modulator with 1 GHz switching capability. Electron. Lett. 39, 232–233 (2003).  Hewitt, P.D., Reed, G.T., Improving the response of optical phase modulators in SOI by computer simulation, J. Lightwave Technol. 18, 443-450, (2000).  Miller, D.A.B., Weiner, J.S., and Chemla, D.S., Electric field dependence of linear optical properties in quantum well structures: waveguide electroabsorption and sum rules. IEEE J. of Quantum Electron. QE-22, 1816-1830 (1986)  Wooten, E. L. et al. A review of lithium niobate modulators for fiber-optic communications systems. IEEE J. Select. Topics Quant. Electron. 6, 69–82 (2000).

49 Communications Technology Lab © 2004 Intel Corporation 49 Silicon Photonics References  Book: Silicon Photonics an Introduction by Graham T Reed, Andrew Knights (Wiley). March 2004  Silicon Photonics. Springer series topics in Applied Physics L. Pavesi, D. Lockwood (due out April 2004) For more info on Intel Research in Silicon Photonics, please visit: www.intel.com/technology/sp www.intel.com/technology/sp


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