1. Soft Timers: Efficient Microsecond Software Timer Support For Network Processing Mohit Aron and Peter Druschel Rice University Presented by Reinette Grobler

2. Managing I/O and other events Asynchronous via Interrupts –Pro: Low latency - occurs immediately after event –Con: High overhead due to context switching Synchronous via Polling –Pro: Avoids interrupts – no context switch –Con: Potential high latency - average latency is (polling interval)/2 Neither overhead of interrupts nor latency of polling is acceptable for high performance time-sensitive applications For example, Gigabit Ethernet network capable of accepting or delivering a full size (1500 byte) packet every 12  sec

3. Hardware Interrupts Control transfer expensive –Interrupt handler usually higher priority than running process –Save and restore CPU state of interrupted process –Cache and TLB misses experienced upon entry and exit from interrupt handler –Causes cache and TLB pollution for interrupted process Expensive even on modern CPUs –Longer pipelines to improve execution rates –Possibly multiple levels of caches Costs usually acceptable if context switch intervals in millisecond range – not microsecond intervals as in high- performance networks

4. Hardware Interrupt Overhead off-chip timeron-chip timer Null-event handler without memory references – no cache or TLB pollution Relative cost increases as CPUs get faster Overhead found to be independent of the event frequency

5. Efficient Event Scheduling Invoke event handler with minimal overhead: avoid interrupts When kernel is already running (for another reason) –Before returning to user mode the kernel checks for and executes pending events –No hardware interrupt: invoking event handler  function call –No need to save or restore CPU state –Memory access locality cost already incurred –Termed: trigger states How often ? –system calls, TLB misses, page faults, I/O interrupts, CPU idle –unpredictable as it depends on workload

6. Soft Timers Soft timer facility checks for pending soft timer events in trigger states Invokes associated handler when appropriate Can schedule events at much finer granularity than would be feasible using periodic hardware interrupt – as long as system reaches trigger states with sufficient frequency Pending events executed without cost of hardware timer interrupt Overdue events scheduled with hardware interrupt

7. Hardware Interrupt Cost with Memory References Soft timers: lower cache pollution and lower overhead than hardware timers

8. Frequency of trigger states When soft timer event is due the associated handler is executed at the earliest time when the system reaches a trigger state Granularity and precision of soft timer facility depends on frequency of trigger states

9. Optimizations in Network Subsystem Rate-based clocking –Goal: high utilization of bandwidth (depends on measurement or estimation of available bandwidth) –Transmit packets at given rate: potentially one packet every 12  sec in Gigabit Ethernet –Packet transmission scheduled at very fine granularity using soft timers Soft-timer-based network polling –Soft-timer events used to trigger reading of network interfaces’ status registers –Scheduled at  sec granularity –Improved memory access locality –May delay packet processing (configurable)

10. Rate-based clocking

11. Network polling Soft timers initiate polling Polling interval adaptively set aggregation quotas from 1 to 15

12. Tighter delay bounds Soft timer events experience probabilistic delays On-chip timer can be integrated with soft timers – tighter worst-case delays for soft timer events at low cost Soft timer event is scheduled with a scheduled time and a deadline Schedule hardware timer event at earliest deadline of all scheduled soft timer events Hardware timer event handler invokes all expired soft timer events

13. Conclusion Soft timers allow the efficient scheduling of events at granularity below conventional timers Useful range of soft timer event granularity appears to widen as CPUs get faster Solution for events that require fine granularity and can tolerate probabilistic delays