1. Pulse Generator High Speed Digital Systems Lab Winter 2007/08 Project definition Instructor: Yossi Hipsh Students: Lior Shkolnitsky, Yevgeniy Lobanov

2. 2 Pulse Generator Topics The main goal The main goal I/O scheme I/O scheme Specifications definition Specifications definition Block diagram (preliminary) Block diagram (preliminary) Time table of the project Time table of the project

3. 3 The main goal To build a Programmable Pulse Generator. To build a Programmable Pulse Generator. The Generator will be integrated into an existing lab experiment, that teaches about High Speed Systems Phenomena: reflections, skew and jitter. The Generator will be integrated into an existing lab experiment, that teaches about High Speed Systems Phenomena: reflections, skew and jitter. The Generator will create a delta signal (very short pulse) and pulse signal into transmission line. The Generator will create a delta signal (very short pulse) and pulse signal into transmission line. This will allow a better way to observe reflections. This will allow a better way to observe reflections. Pulse Generator

4. 4 I/O scheme Programmable Fast Pulse Module Power supply Function selection Short pulse (delta) Long pulse (step) Pulse Generator

5. 5 Specifications definition OUTPUTS Short pulse width: 0.5 to 1 nSec Short pulse width: 0.5 to 1 nSec Long pulse width: 10 to 13 nSec Long pulse width: 10 to 13 nSec Very fast rising/falling edge: ~130 pSec Very fast rising/falling edge: ~130 pSec Pulses repetition: 0.1-1 µ Sec (1-10 MHz) Pulses repetition: 0.1-1 µ Sec (1-10 MHz) Stable period (low jitter): <10psec peak-to-peak Stable period (low jitter): <10psec peak-to-peakINPUTS Function selection: Function selection: Control of the pulse width: 10pSec steps Control of the pulse width: 10pSec steps 32 fixed pulse widths, changed by switch, to provide different results for different students 32 fixed pulse widths, changed by switch, to provide different results for different students Power supply: +2.5 to +5 Vdc Power supply: +2.5 to +5 Vdc Pulse Generator

6. 6 Block diagram (preliminary) An option: to use a two channel delay unit - NB6L296M. Splitter Buffer Oscillator AND Controller Programmable Delay Power Supply Programmable Delay Pulse Generator

7. 7 Time table of the project Task \ Week 1234567891011121314 Exploring the problem 22-10 Definition presentation 22-11 Block diagram consolidation Finding suitable components Designing the board Design presentation 19-12 Ordering components and board Writing the booklet Designing a test setup Building the project 15-01 Building the test setup Test and Debug Final presentation 30-01 Pulse Generator

8. 8 Questions / Answers Thank you! Pulse Generator

9. 9 Backup

10. 10High-speed experiment upgrade

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