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Marc Riedel The Synthesis of Stochastic Logic for Nanoscale Computation IWLS 2007, San Diego May 31, 2007 Weikang Qian and John Backes Circuits & Biology.

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Presentation on theme: "Marc Riedel The Synthesis of Stochastic Logic for Nanoscale Computation IWLS 2007, San Diego May 31, 2007 Weikang Qian and John Backes Circuits & Biology."— Presentation transcript:

1 Marc Riedel The Synthesis of Stochastic Logic for Nanoscale Computation IWLS 2007, San Diego May 31, 2007 Weikang Qian and John Backes Circuits & Biology Lab, University of Minnesota joint work with

2 5/31/07IWLS 20072 Computing Beyond CMOS Intense research into novel materials and devices: Carbon Nanotubes… Molecular Switches… Biological Processes…

3 5/31/07IWLS 20073 Computing Beyond CMOS Many technologies still in exploratory phase: ! 

4 5/31/07IWLS 20074 Nanoscale Circuits Topological constraints. Inherent randomness. High defect rates. Features: Challenges: High density of bits. Identify general traits that impinge upon logic synthesis: carbon nanowire crossbar

5 Circuit Modeling logic 0 1 0 0 1 Characterize probability of outcomes. inputsoutputs Model defects, variations, uncertainty, etc.:

6 Circuit Modeling logic Functional description is Boolean: inputsoutputs

7 Consider a probabilistic interpretation: logic stochastic logic inputsoutputs Circuit Modeling

8 stochastic logic Stochastic Logic inputsoutputs 0 1 0 0,1,1,0,1,0,1,1,0,1,… 1,0,0,0,1,0,0,0,0,0,… p 1 = Prob(one) p 2 = Prob(one) serial bit streams Consider a probabilistic interpretation:

9 stochastic logic Stochastic Logic inputsoutputs 0 1 0 Consider a probabilistic interpretation:

10 stochastic logic Stochastic Logic 0 1 0 0 1 0 0 1 0 1 0 0 0 p 1 = Prob(one) p 2 = Prob(one) parallel bit streams Consider a probabilistic interpretation:

11 stochastic logic Stochastic Logic 0 1 0 parallel bit streams Consider a probabilistic interpretation:

12 stochastic logic Stochastic Logic Interpret outputs according to fractional weighting: 0 1 0

13 5/31/07IWLS 200713 Synthesis of Stochastic Logic Circuit that computes a probability distribution corresponding to a logical specification. Given a technology characterized by: Synthesize: High degree of structural parallelism. Inherent randomness in logic/interconnects. Cast problem in terms of arithmetic operations. Perform synthesis with binary moment diagrams. Strategy:

14 5/31/07IWLS 200714 A real value x in [ 0, 1 ] is encoded as a stream of bits X. For each bit, the probability that it is one is: P( X=1 ) = x. Probabilistic Bundles 0 1 0 0 1 x X

15 5/31/07IWLS 200715 Arithmetic Operations Multiplication(Scaled) Addition ba BPAP CPc    )()( )( ) )1( ()](1[)()( )( bsas BPSPAPSP CPc   

16 5/31/07IWLS 200716 Nanowire Crossbar (idealized)

17 5/31/07IWLS 200717 Nanowire Crossbar (idealized) Randomized connections, yet nearly one-to-one.

18 5/31/0718 Shuffled AND

19 5/31/07IWLS 200719 Takes the AND of randomly chosen pairs. Multiplication Shuffled AND

20 5/31/0720 Bundleplexing

21 Scaled Addition Randomly selection of wires from different bundles,. Randomly selection of wires from different bundles, according to a fixed ratio. ¾ Bundleplexer

22 5/31/07IWLS 200722 Stochastic Logic Shuffled ANDs, Bundleplexers { { A 0 A 1... { A n } B

23 5/31/07IWLS 200723 Stochastic Logic Shuffled ANDs, Bundleplexers { { { }... 1 0 1

24 5/31/07IWLS 200724 Synthesis Strategy From circuit, construct a data structure called a multiplicative binary moment diagram (*BMD). Manipulate the *BMD into the right form. Implement a stochastic circuit with Shuffled AND gates and Bundleplexors.

25 5/31/07IWLS 200725 Arithmetic Functions 432143421321 2xxxxxxxxxxxxf 

26 5/31/07IWLS 200726 Construct *BMD See R. Bryant, “Verification of Arithmetic Circuits with BMDs,” 1995. 432143421321 2xxxxxxxxxxxxf  xfwfwf RRLL  f L f R

27 Split *BMD 432143421321 2xxxxxxxxxxxxf  positivenegative

28 positive Normalize 43421321 xxxxxxxxf  P X 432143421321 2xxxxxxxxxxxxf 

29 5/31/07IWLS 200729 Implement Stochastic Logic x w f R f L X w SAND BUX x f R f L X

30 5/31/07IWLS 200730 Implement Stochastic Logic

31 Size of Stochastic Circuits Circuit#Device#Input#Output#StDeviceRatio C171452261.86 b11834 1.00 majority1851231.28 lion1943301.58 cm138a43681042.42 bbtas4455741.68 cm42a49410611.24 tcon581716731.26 beecount62671081.74 decod695161942.81 sqrt8ml7484871.18 sqrt87984871.10 c818428182721.48 Average1.54

32 CircuitS Ratio of Bundle Widths to Scaling S 5102050100 C1748.363.131.020.00 b135.631.720.000.160.00 majority94.691.880.940.310.00 mc63.972.120.420.070.00 cm138a80.550.510.220.020.00 bbtas75.841.910.780.090.00 cm42a40.910.560.03 0.00 tcon21.500.230.010.00 Decod164.811.900.720.110.05 Sqrt8ml243.561.760.820.390.04 Sqrt8246.601.520.860.12 c865.933.091.030.120.01 Average9.134.361.830.600.120.02 Error Percentages

33 5/31/07IWLS 200733 Discussion Exploits both parallelism and randomness. Obviates the need for post-fabrication configuration. Measured tradeoff between degree of redundancy and accuracy of the computation.

34 5/31/07IWLS 200734 drug compound (fixed quantity) E. Coli Research Theme: Probabilistic Computing Bacteria are genetically engineered to produce a drug that fights cancer.

35 5/31/07IWLS 200735 Bacteria invade cancerous tissue: cancerous tissue Research Theme: Probabilistic Computing

36 5/31/07IWLS 200736 Compound is injected. cancerous tissue Bacteria produce the drug: Research Theme: Probabilistic Computing

37 5/31/07IWLS 200737 produce drug compound E. Coli Needed: synthesis of probabilistic response in each bacterium. with Prob. 0.3 don’t produce drug with Prob. 0.7 See B. Fett, J. Bruck and M. Riedel, “Synthesizing Stochasticity in Biochemical Systems”, DAC 2007. Research Theme: Probabilistic Computing


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