1. Feb 2006Jean-Sébastien Graulich PID Front End Electronics, Outlook after DAQ Workshop 02 Jean-Sebastien Graulich, Univ. Genève o Introduction o Tracker o TOF o EmCal o Conclusions and Plan

2. Feb 2006Jean-Sébastien GraulichSlide 2 Introduction  DAQ WS02 took place at Fermilab, Feb 10 – Feb 11 http://mice.iit.edu/daq/daq2/daq2.html  10 people registered, 5 more connected by phone  Workshop goals Review on Front End Electronics Review on Data Storage and Online Computing Rem: No discussion on Control and Monitoring

3. Feb 2006Jean-Sébastien GraulichSlide 3 On the Agenda  Talks on Front End Electronics for DDAQ J.S. GraulichBaseline hardware architecture T. HartAFE IIt I. RusinovStretcher/Integrator Solutions K. BowieTeV IPM – Front-End Board R. KwarcianyTeV IPM – Reciever Board M. BonesiniTOF Front End Electronics J.S. GraulichIPM for MICE ?  Talks on Data Storage and Computing M. EllisData Storage (and Computing needs)  + A lot of discussions

4. Feb 2006Jean-Sébastien GraulichSlide 4 WS Goals (A. Bross)  Advance us towards making final decisions on the DAQ and front-end electronics  Why is this important?  Straw man timeline: Taking Data 6/07 DAQ System Debug 3/07 DAQ System Install 12/06 DAQ System Procure 8/06 DAQ System Final Spec 7/06 DAQ System TB (BTF) 6/06

5. Feb 2006Jean-Sébastien GraulichSlide 5 AFE II-t (T. Hart)  VME to PC data throughput should be fine for MICE - If MICE uses a data word format similar to that used for the KEK tests, each muon event with charge and time information will have about 65,280 bytes. - (600 muons/sec)  (65,280 bytes) = 37.3 MB/sec. This is achievable with the 47.4 MB/sec capability mentioned earlier.  Full digitization of charges and times limit reconstruction rate to about 225 muons/spill. - Total digitization time for 32 channels on a TRIP-t chip is about 4.4  s or about 225 muons/sec. - If only discriminator information is used (Hit or no hit?), maximum instantaneous rate is about 7000 muons/sec. - MICE/AFE II t CDR discusses this in detail.

6. Feb 2006Jean-Sébastien GraulichSlide 6 MICE/AFE II-t Plans (T. Hart)  Prepare CDR and TRD.  Set up IIT test stand to become part of the D0 AFE II t tests.  Determine special MICE requirements and test AFE II t boards for these.  Set up RAL test stand for tracker quality control.

7. Feb 2006Jean-Sébastien GraulichSlide 7 TOF FEE Summary Baseline: Constant Fraction Discriminator (CFD)  Advantage:  Advantage: Easy Cabling and No need for ADC  Drawback:  Drawback: No information at all on the charge (Energy Deposit)  Cost (TDC excluded):  Cost (TDC excluded): ~ 230 EUR/ch (CFD) (please update! Sorry) Option 2 : Measure the charge with CAEN QDC Option 3 : Measure the charge with Tev-IPM QIE  Advantage:  Advantage: More Precise Time Walk correction and Good Charge Measurement (useful for PID)  Drawback:  Drawback: Not available yet, not tested Requires Splitters and delay cables  Cost (TDC excluded):  Cost (TDC excluded): ~ 150 EUR/ch (Discri) (please update! Sorry) 200 EUR/ch (QDC) or ~ 160(?) EUR/ch (QIE) Assuming free splitters and delay cables (from HARP) Option 4 : Use Time over Threshold Discri (NINO)  Advantage:  Advantage: Easy Cabling and Good precision and Charge Information  Drawback:  Drawback: Not available yet, not tested, not linear in charge  Cost (TDC excluded):  Cost (TDC excluded): ~ 50 EUR/ch (Board production) Same as EmCal

8. Feb 2006Jean-Sébastien GraulichSlide 8 EmCal FEE Summary Option 1. Conventional gated QDC  Advantages Familiar, proven design Standard VME board, well documented Support from the company (CAEN), the equipment have a long live after MICE  Drawbacks The module does NOT exist yet, prototype could be delivered at the end of the year  Cost Transformers (since PMt have differential outputs) + Discriminators (150 EUR/Ch) + TDC ( 60 EUR/ch) + QDC (200 EUR/ch) + Delay Cables

9. Feb 2006Jean-Sébastien GraulichSlide 9 Problem With Option 1.  850 microsecond RF Flat top  Multiple events per burst rejected  #events vs dead Time -> QDC with 500 ns Digitization time !!!

10. Feb 2006Jean-Sébastien GraulichSlide 10 EmCal Charge Measurement Options Option 2. QIE (TeV IPM)  Advantages No dead time Precise Charge measurement The transformer can probably be included in the front end board (if we re-layout the board…) Could be used for TOF (or CKOV) charge measurement  Drawbacks Not a plug-and-play system Not Linux based -> require software work Not VME readout, makes the DAQ more tricky.  Cost + QIE+Buffer+Timing (160(?) EUR/ch) + Discriminators (125 EUR/Ch) + TDC ( 60 EUR/ch)

11. Feb 2006Jean-Sébastien GraulichSlide 11 QIE General Description The system is designed for a PC based DAQ The system is not yet fully commissioned 4 different cards are needed Among them 2 are PCI cards for which there is no Linux driver available An outdated driver exists for the Data Buffer cards The Front End Board is the QIE Card. It integrates the charge received on the input over a given time (the sampling period) and transfer it to the Buffer Card in a free running continuous mode. No dead time. Data in coincidence with the “Gate” signal is tagged (one bit in the header) The Buffer Card is also doing Data Sparcification It is possible to store only the data which is tagged as being in coincidence with the “Gate” It has a very large buffer memory (enough to store 400 ms of continuous sampling at 15 MHz) The Timing Card is also doing the Control for the QIE Cards It is doing the initialization of the QIE Card, under request from the PC It provides the sampling clock (here 15 MHz, up to 35 MHz possible) It has two external TTL (Lemo) inputs. The interpretation of the input signals is determined by firmware. They can be used as gate inputs. Input Signal Timing card (PCI) Timing fanout QIE cards (16x 8 ch) Data Buffer (2*8 ch) (PCI) Host PC (LabView) “Gate”

12. Feb 2006Jean-Sébastien GraulichSlide 12 EmCal Charge Measurement Options Option 3. 200 MHz Flash ADCs  Advantages No Splitter, no delay, no discri, no TDC ! Cabling very easy Equipment has a long life after MICE  Drawbacks Transformer -> Shaper Time resolution not tested  Cost Flash ADC (450 EUR/ch) 2 ns rise time Shaper V thr t thr >30 ns rise time If we can fit the rising edge, time resolution can be much higher than the 5 ns of the sampling rate.

13. Feb 2006Jean-Sébastien GraulichSlide 13 FEE Conclusions  Decision 3 FEE Options will be tested in Geneva before BTF NINO for TOF QIE-IPM for EmCal 200 MHz Flash ADCs for EmCal  Plan Bring everything for test in Geneva - QIE-IPM system from Fermilab. - PMTs + cables for TOF and EmCal Setting up a test lab at CERN Test DAQ system and VME-PCI interface first Test NINO chip using CERN/MIC test board Test QIE-IPM as soon as we receive the parts Test Struck 200 MHz Flash ADC