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VLSI Arithmetic Adders Prof. Vojin G. Oklobdzija University of California

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Presentation on theme: "VLSI Arithmetic Adders Prof. Vojin G. Oklobdzija University of California"— Presentation transcript:

1 VLSI Arithmetic Adders Prof. Vojin G. Oklobdzija University of California http://www.ece.ucdavis.edu/acsel

2 Oklobdzija 2004Computer Arithmetic2 Introduction Digital Computer Arithmetic belongs to Computer Architecture, however, it is also an aspect of logic design. The objective of Computer Arithmetic is to develop appropriate algorithms that are utilizing available hardware in the most efficient way. Ultimately, speed, power and chip area are the most often used measures, making a strong link between the algorithms and technology of implementation.

3 Oklobdzija 2004Computer Arithmetic3 Basic Operations Addition Multiplication Multiply-Add Division Evaluation of Functions Multi-Media

4 Addition of Binary Numbers

5 Oklobdzija 2004Computer Arithmetic5 Addition of Binary Numbers Full Adder. The full adder is the fundamental building block of most arithmetic circuits: The sum and carry outputs are described as: Full Adder C in C out sisi aiai bibi

6 Oklobdzija 2004Computer Arithmetic6 Addition of Binary Numbers Propagate Generate InputsOutputs cici aiai bibi sisi c i+1 00000 00110 01010 01101 10010 10101 11001 11111

7 Oklobdzija 2004Computer Arithmetic7 Full-Adder Implementation Full Adder operations is defined by equations: One-bit adder could be implemented as shown Carry-Propagate: and Carry-Generate g i

8 Oklobdzija 2004Computer Arithmetic8 High-Speed Addition One-bit adder could be implemented more efficiently because MUX is faster

9 Oklobdzija 2004Computer Arithmetic9 The Ripple-Carry Adder

10 Oklobdzija 2004Computer Arithmetic10 The Ripple-Carry Adder From Rabaey

11 Oklobdzija 2004Computer Arithmetic11 Inversion Property From Rabaey

12 Oklobdzija 2004Computer Arithmetic12 Minimize Critical Path by Reducing Inverting Stages From Rabaey

13 Oklobdzija 2004Computer Arithmetic13 Ripple Carry Adder Carry-Chain of an RCA implemented using multiplexer from the standard cell library: Critical Path Oklobdzija, ISCAS’88

14 Oklobdzija 2004Computer Arithmetic14 Manchester Carry-Chain Realization of the Carry Path Simple and very popular scheme for implementation of carry signal path

15 Oklobdzija 2004Computer Arithmetic15 Original Design T. Kilburn, D. B. G. Edwards, D. Aspinall, "Parallel Addition in Digital Computers: A New Fast "Carry" Circuit", Proceedings of IEE, Vol. 106, pt. B, p. 464, September 1959.

16 Oklobdzija 2004Computer Arithmetic16 Carry-Skip Adder MacSorley, Proc IRE 1/61 Lehman, Burla, IRE Trans on Comp, 12/61

17 Oklobdzija 2004Computer Arithmetic17 Carry-Skip Adder Bypass From Rabaey

18 Oklobdzija 2004Computer Arithmetic18 Carry-Skip Adder: N-bits, k-bits/group, r=N/k groups

19 Oklobdzija 2004Computer Arithmetic19 Carry-Skip Adder k

20 Oklobdzija 2004Computer Arithmetic20 Variable Block Adder (Oklobdzija, Barnes: IBM 1985)

21 Oklobdzija 2004Computer Arithmetic21 Carry-chain of a 32-bit Variable Block Adder (Oklobdzija, Barnes: IBM 1985)

22 Oklobdzija 2004Computer Arithmetic22 Carry-chain of a 32-bit Variable Block Adder (Oklobdzija, Barnes: IBM 1985) 1 1 3 3 4 4 5 5 6  =9 Any-point-to-any-point delay = 9  as compared to 12  for CSKA

23 Oklobdzija 2004Computer Arithmetic23 Delay Calculation for Variable Block Adder (Oklobdzija, Barnes: IBM 1985) Delay model:

24 Oklobdzija 2004Computer Arithmetic24 Variable Block Adder (Oklobdzija, Barnes: IBM 1985) Variable Group Length Oklobdzija, Barnes, Arith’85

25 Oklobdzija 2004Computer Arithmetic25 Carry-chain of a 32-bit Variable Block Adder (Oklobdzija, Barnes: IBM 1985) Variable Block Lengths No closed form solution for delay It is a dynamic programming problem

26 Oklobdzija 2004Computer Arithmetic26 Delay Comparison: Variable Block Adder VBA- Multi-Level CLA VBA

27 VLSI Arithmetic Lecture 4 Prof. Vojin G. Oklobdzija University of California http://www.ece.ucdavis.edu/acsel

28 Oklobdzija 2004Computer Arithmetic28 Carry-Lookahead Adder (Weinberger and Smith, 1958) Ref: A. Weinberger and J. L. Smith, “A Logic for High-Speed Addition”, National Bureau of Standards, Circ. 591, p.3-12, 1958. ARITH-13: Presenting Achievement Award to Arnold Weinberger of IBM (who invented CLA adder in 1958)

29 Oklobdzija 2004Computer Arithmetic29 CLA Definitions: One-bit adder

30 Oklobdzija 2004Computer Arithmetic30 CLA Definitions: 4-bit Adder

31 Oklobdzija 2004Computer Arithmetic31 Carry-Lookahead Adder: 4-bits GjGj PjPj

32 Oklobdzija 2004Computer Arithmetic32 Carry-Lookahead Adder One gate delay  to calculate p, g One  to calculate P and two for G Three gate delays To calculate C 4(j+1) Compare that to 8  in RCA !

33 Oklobdzija 2004Computer Arithmetic33 Carry-Lookahead Adder (Weinberger and Smith) Additional two gate delays C 16 will take a total of 5  vs. 32  for RCA !

34 Oklobdzija 2004Computer Arithmetic34 32-bit Carry Lookahead Adder

35 Oklobdzija 2004Computer Arithmetic35 Carry-Lookahead Adder (Weinberger and Smith: original derivation, 1958 )

36 Oklobdzija 2004Computer Arithmetic36 Carry-Lookahead Adder (Weinberger and Smith: original derivation )

37 Oklobdzija 2004Computer Arithmetic37 Carry-Lookahead Adder (Weinberger and Smith) please notice the similarity with Parallel-Prefix Adders !

38 Oklobdzija 2004Computer Arithmetic38 Carry-Lookahead Adder (Weinberger and Smith) please notice the similarity with Parallel-Prefix Adders !

39 Motorola: CLA Implementation Example A. Naini, D. Bearden and W. Anderson, “A 4.5nS 96b CMOS Adder Design”, Proceedings of the IEEE Custom Integrated Circuits Conference, May 3-6, 1992.

40 Oklobdzija 2004Computer Arithmetic40 Critical path in Motorola's 64-bit CLA 1.05nS 1.7nS 2.0nS 2.35nS 2.7nS 3.75nS 4.8nS

41 Oklobdzija 2004Computer Arithmetic41 Motorola's 64-bit CLA conventional PG Block carry ripples locally 5-transistors in the path no better situation here ! Basically, this is MCC performance with Carry-Skip. One should not expect any better results than VBA.

42 Oklobdzija 2004Computer Arithmetic42 Motorola's 64-bit CLA Modified PG Block Intermediate propagate signals P i:0 are generated to speed-up C 3 still critical path resembles MCC

43 Oklobdzija 2004Computer Arithmetic43 Motorola's 64-bit CLA 1.8nS 2.2nS 2.9nS 3.2nS 3.55nS 3.9nS

44 Oklobdzija 2004Computer Arithmetic44 1.05nS 1.7nS 2.0nS 2.35nS 2.7nS 3.75nS 4.8nS 1.8nS 2.2nS 2.9nS 3.2nS 3.55nS 3.9nS


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