1. Figure Half-adder

2. Figure Full-adder

3. Figure5.7 Circuit that multiplies an 8-bit unsigned number by 3: a a 7 x x y y 7 7 c 7 s s 7 x x x y y y 8 7 8 7 c 8 s s 8 P = 3 A : P P P 9 8
(a) Naive approach A : a a 7 x x x y y y 8 1 8 7 c 8 s s 8 P = 3 A : P P P 9 8
(b) Efficient design
Figure Circuit that multiplies an 8-bit unsigned number by 3

4. Figure5.32 Multiplication of unsigned numbers
Multiplicand M
(14)
Multiplier Q
(11)
Product P
(154)
(a) Multiplication by hand
Multiplicand M
(11)
Multiplier Q
(14)
Partial product 0 +
Partial product 1 +
Partial product 2 +
Product P
(154)
(b) Multiplication for implementation in hardware
Figure Multiplication of unsigned numbers

5. Figure5.33 A 4 x 4 multiplier circuit

6. Figure5.34 Multiplication of signed numbers
Multiplicand M
(+14)
Multiplier Q
(+11) x
Partial product 0
0 0 +
Partial product 1 +
Partial product 2 +
Partial product 3 +
Product P
(+154)
(a) Positive multiplicand
Multiplicand M
( 14) –
Multiplier Q
(+11)
Partial product 0
1 1 + 1
Partial product 1 1 +
Partial product 2 1 + 1
Partial product 3 1 +
Product P
( 154) –
(b) Negative multiplicand
Figure Multiplication of signed numbers

7. Table 5.4 The seven-bit ASCII code