1. 1 Processor Array Architectures for Deep Packet Classification Authors: Fayez Gebali and A.N.M. Ehtesham Rafiq Publisher: IEEE Transactions on Parallel and Distributed Systems Present: Kai-Tso Chang Date: October, 22, 2008

2. 2 Define T: text length : n t 0 t 1 …t n-1 P: pattern length : m p 0 p 1 …p m-1

3. 3 The basic string matching algorithm

4. 4 Expressing the algorithm as an iterative expression 1. represents an m-input AND function 2. Match(a,b) is a function that is true when character a matches b 1=y 0 input text: abcdx xxxxx 1=y 1 input text: xabcd xxxxx … 1=y 6 input text: xxxxx xabcd

5. 5 Dependence graph (DG) a b c d

6. 6 Timing fuction The column vector s =[s 1,s 2 ] is the scheduling vector and s is an integer

7. 7 Timing function

8. 8 Pipeline, broadcast Pipeline a certain variable whose null vector is e, we must satisfy the following inequality Broadcast a variable whose null vector is e, we must have

9. 9 Pipeline, broadcast We have only one output variable Y whose null-vector is Pipeline: Broadcast:

10. 10 Timing function 1 1 0 2 2 2 3 3 3 3 4 4 4 45 5 5 56 6 6 6 7 8 7 789 a b c d

11. 11 Pipeline, broadcast

12. 12 DG Node Projection a b c d

13. 13 DG Node Projection

14. 14 DG Node Projection

15. 15 Design 1.a 1 1 0 2 2 2 3 3 3 3 4 4 4 45 5 5 56 6 6 6 7 8 7 789 a b c d

16. 16 Design 1.a

17. 1 0 2 3 T d c b a a b c d a a a b b b c c c d d d 1 1 1 1 1 1 1 1 clock 0clock 1clock 2clock 3 Input text: abcdx xxxxx

18. 18 Design 1.b 1 1 0 2 2 2 3 3 3 3 4 4 4 45 5 5 56 6 6 6 7 8 7 789 a b c d

19. 19 Design 1.b

20. 20 Design 1.b

21. 21 Design 1.c 1 1 0 2 2 2 3 3 3 3 4 4 4 45 5 5 56 6 6 6 7 8 7 789 a b c d

22. 22

23. 23 Design 1.c

24. 24 Comparing designs 1.a and 1.b

25. 25 Design 2

26. 26 Design 2 5 6 7 8 6 7 8 8 789 10 11 12 9 9 9 10 11 10 11 12 11 12 13 14 a b c d

27. 27 Design 2.a 5 6 7 8 6 7 8 8 789 10 11 12 9 9 9 10 11 10 11 12 11 12 13 14 a b c d

28. 28 Design 2.a

29. 29 0 1 2 3 clock 0 a a b c d clock 1clock 2clock 3clock 4clock 5clock 6clock 7clock 8 a b a a b c a b b c d a b c d x c a b c d x x d a b c d x x x x a c d x x x x x a b c d x x x x x x 1 1 1 1 1 1 1 c b a b d x a c b

30. 30 Design 2.b

31. 31 Comparing designs 1.a and 2.a

32. 32 Design 3 Broadcast:

33. 33 Design 3 4 4 4 4 5678910 56789 56789 56789 a b c d

34. 34 Design 3.a 0 1 2 3 T

35. 35 a a a a a a a b b b b b b b c c c a c c d d d d c b a clock 0 clock 1clock 2 clock 3 clock 4