1. ECE 667 - Synthesis & Verification - Lecture 2 1 ECE 697B (667) Spring 2006 ECE 697B (667) Spring 2006 Synthesis and Verification of Digital Circuits Scheduling Heuristic Algorithms Adopted, with permission, from M Srivastava and M. Podkonjak, UCLA, 2003.

2. ECE 667 - Synthesis & Verification - Lecture 2 2 Scheduling, Allocation, and Assignment Techniques well understood and mature Copyright 2003  Mani Srivastava

3. ECE 667 - Synthesis & Verification - Lecture 2 3 Scheduling and Assignment - overview 4 control steps + ** Control Step + * Control Step Copyright 2003  Mani Srivastava Schedule 1 s1 s2 s3 +1 +2+2 *1 s3 s4 +3 *2 *3 s2 s3 s4 Schedule 2 +1 +2+2 *1 s1 s2s3 *2 +3 *3

4. ECE 667 - Synthesis & Verification - Lecture 2 4 Algorithm Description  Data Flow Graph Copyright 2003  Mani Srivastava

5. ECE 667 - Synthesis & Verification - Lecture 2 5 Control Data Flow Graph (CDFG) Copyright 2003  Mani Srivastava

6. ECE 667 - Synthesis & Verification - Lecture 2 6 Sequencing Graph Copyright 2003  Mani Srivastava

7. ECE 667 - Synthesis & Verification - Lecture 2 7 Sequencing Graph * ** +< *** + Add source and sink nodes (NOP) to the DFGAdd source and sink nodes (NOP) to the DFG * NOP ** +< *** + Data Flow Graph (DFG) Sequencing Graph

8. ECE 667 - Synthesis & Verification - Lecture 2 8 As Soon as Possible scheduling – –Unconstrained minimum latency scheduling – –Uses topological sorting of the sequencing graph (polynomial time) – –Gives optimum solution to scheduling problem – –Schedule first the first node n o  T1 until last node n v is scheduled ASAP Scheduling Algorithm

9. ECE 667 - Synthesis & Verification - Lecture 2 9 ASAP Scheduling Algorithm - example Copyright 2003  Mani Srivastava start finish TS = 4 TS = 3 TS = 2 TS = 1

10. ECE 667 - Synthesis & Verification - Lecture 2 10 ASAP Scheduling Example Sequence Graph ASAP Schedule Copyright 2003  Mani Srivastava

11. ECE 667 - Synthesis & Verification - Lecture 2 11 ALAP Scheduling Algorithm Copyright 2003  Mani Srivastava As late as Possible scheduling –Latency-constrained scheduling (latency is fixed) –Uses reversed topological sorting of the sequencing graph –If over-constrained (latency too small), solution may not exist –Schedule first the last node n v  T, until first node n 0 is scheduled (Latency)

12. ECE 667 - Synthesis & Verification - Lecture 2 12 ALAP Scheduling Algorithm - example Copyright 2003  Mani Srivastava TS = 4 = T TS = 3 TS = 2 TS = 1 start finish

13. ECE 667 - Synthesis & Verification - Lecture 2 13 ALAP Scheduling Example Sequence Graph ALAP Schedule (latency constraint = 4) Copyright 2003  Mani Srivastava

14. ECE 667 - Synthesis & Verification - Lecture 2 14 Slack of Operator i: S i = TS i ALAP – TS i ASAPSlack of Operator i: S i = TS i ALAP – TS i ASAP –Defines mobility of the operators * NOP ** < ** * + 1 2 3 4 5 6 7 8 9 10 11 0 n + 0 * NOP * * +< * * * + 1 2 3 4 5 6 7 8 9 10 11 n S 6 = 2-1 = 1 S 7 = 2-1 = 1 S 8 = 3-1 = 2 S 9 = 4-2 = 2 S 10 = 3-1 = 2 S 11 = 4-2 = 2 Computing Slack (mobility)

15. ECE 667 - Synthesis & Verification - Lecture 2 15 Timing Constraints Time measured in cycles or control steps Imposing relative timing constraints between operators i and j – –max & min timing constraints

16. ECE 667 - Synthesis & Verification - Lecture 2 16 Constraint Graph G c (V,E) MULT delay =2 ADD delay = 1

17. ECE 667 - Synthesis & Verification - Lecture 2 17 Existence of schedule under timing constraints Example: – –Assume delays: ADD=1, MULT=2 – –Path {1  2} has weight 2  u 12 =3, that is cycle {1,2,1} has weight = -1, OK – –No positive cycles in the graph, so it has a consistent schedule Upper bound (max timing constraint) is a problem Examine each max timing constraint (i, j): –Longest weighted path between nodes i and j must be  max timing constraint u ij. –Any cycle in G c including edge (i, j) must be negative or zero Necessary and sufficient condition: –The constraint graph G c must not have positive cycles

18. ECE 667 - Synthesis & Verification - Lecture 2 18 Existence of schedule under timing constraints Example: satisfying assignment – –Assume delays: ADD=1, MULT=2 – –Feasible assignment: Vertex Start time v 0  step 1 v 1  step 1 v 2  step 3 v 3  step 1 v 4  step 5 v n  step 6

19. ECE 667 - Synthesis & Verification - Lecture 2 19 Observation about ALAP & ASAP No priority is given to nodes on critical pathNo priority is given to nodes on critical path As a result, less critical nodes may be scheduled ahead of critical nodesAs a result, less critical nodes may be scheduled ahead of critical nodes No problem if unlimited hardware is availableNo problem if unlimited hardware is available However if the resources are limited, the less critical nodes may block the critical nodes and thus produce inferior schedulesHowever if the resources are limited, the less critical nodes may block the critical nodes and thus produce inferior schedules List scheduling techniques overcome this problem by utilizing a more global node selection criterionList scheduling techniques overcome this problem by utilizing a more global node selection criterion Copyright 2003  Mani Srivastava

20. ECE 667 - Synthesis & Verification - Lecture 2 20 Hu’s Algorithm Simple case of the scheduling problem – –Operations of unit delay – –Operations (and resources) of the same type Hu’s algorithm – –Greedy – –Polynomial AND optimal – –Computes lower bound on number of resources for a given latency (MR-LCS), OR – –computes lower bound on latency subject to resource constraints (ML-RCS) Basic idea: – –Label operations based on their distances from the sink – –Try to schedule nodes with higher labels first (i.e., most “critical” operations have priority) [©Gupta]

21. ECE 667 - Synthesis & Verification - Lecture 2 21 Hu’s Algorithm HU (G(V,E), a) { Label the vertices // label = length of longest path passing through the vertex l = 1 repeat { U = unscheduled vertices in V whose predecessors have been scheduled (or have no predecessors) Select S  U such that |S|  a and labels in S are maximal Schedule the S operations at step l by setting t i =l, i: v i  S. l = l + 1 } until v n is scheduled. } [©Bazargan]

22. ECE 667 - Synthesis & Verification - Lecture 2 22 Hu’s Algorithm: Example (a=3) [©Gupta]

23. ECE 667 - Synthesis & Verification - Lecture 2 23 List Scheduling Greedy algorithm for ML-RCS and MR-LCS – –Does NOT guarantee optimum solution Similar to Hu’s algorithm – –Operation selection decided by criticality – –O(n) time complexity More general input – –Resource constraints on different resource types [©Bazargan]

24. ECE 667 - Synthesis & Verification - Lecture 2 24 List Scheduling Algorithm: ML-RCS LIST_L (G(V,E), a) { l = 1 repeat { for each resource type k { U l,k = available vertices in V. T l,k = operations in progress. Select S k  U l,k such that | S k | + | T l,k |  a k Schedule the S k operations at step l } l = l + 1 } until v n is scheduled. } [©Bazargan]

25. ECE 667 - Synthesis & Verification - Lecture 2 25 List Scheduling: Example (a=[3,1]) [©Gupta]

26. ECE 667 - Synthesis & Verification - Lecture 2 26 List Scheduling Algorithm: MR-LCS LIST_R (G(V,E), ’) { a = 1, l = 1 Compute the ALAP times t L. if t 0 L < 0 return (not feasible) repeat { for each resource type k { U l,k = available vertices in V. Compute the slacks { s i = t i L - l,  v i  U l,k }. Schedule operations with zero slack, update a Schedule additional S k  U l,k under a constraints } l = l + 1 } until v n is scheduled. } [©Bazargan]

27. ECE 667 - Synthesis & Verification - Lecture 2 27 List Scheduling Algorithm Algorithm 1: Minimize latency under resource constraintAlgorithm 1: Minimize latency under resource constraint –Resource constraint represented by vector a (indexed by resource type) Example: two resources, MULT, ADD; a 1 =1, a 2 =2Example: two resources, MULT, ADD; a 1 =1, a 2 =2 –U l,k = set of candidate operations for resource type k at time step l The candidate operations U l,kThe candidate operations U l,k –those operations of type k whose predecessors have already been scheduled early enough so that they are completed at step l: U l,k = { v i  V: type(v i ) = k and t j + d j  l, for all j: (v i, v j )  E The unfinished operations T l,kThe unfinished operations T l,k –those operations of type k that started at earlier cycles but whose execution is not finished at step l: T l,k = { v i  V: type(v i ) = k and t i + d i > l Priority listPriority list –List operators according to some heuristic urgency measure –Common priority list: labeled by position on the longest path in decreasing order (the most urgent operations are scheduled first)

28. ECE 667 - Synthesis & Verification - Lecture 2 28 List Scheduling Algorithm (1) LIST_L(G c (V,E), a) { % Minimize latency under resource constraint l = 1; repeat { for each resource type k = 1,2, …, N r {determine candidate operations U l,k ; determine unfinished operations T l,k ; select S k  U l,k vertices such that: |S k |+|T k |  a k ; schedule the S k operations at step l by setting t i = l for all v i  S k ; } l = l +1 ; { until (v n is scheduled) return (t) }

29. ECE 667 - Synthesis & Verification - Lecture 2 29 List Scheduling – example 1a Assumptions – –All operations have unit delay – –Resource constraints: MULT: a 1 = 2, ALU: a 2 = 2 Step 1: – –U 1,1 = {v 1,v 2, v 6, v 8 }, select {v 1,v 2 } – –U 1,2 = {v 10 }, select + schedule Step 2: – –U 2,1 = {v 3,v 6, v 8 }, select {v 3,v 6 } – –U 2,2 = {v 11 }, select + schedule Step 3: – –U 3,1 = {v 7,v 8 }, select + schedule – –U 3,2 = {v 4 }, select + schedule Step 4: – –U 4,2 = {v 5,v 9 }, select + schedule * NOP * * < * * + 1 2 3 4 5 6 7 * 8 + 9 10 11 0 n T1 T2 T3 T4

30. ECE 667 - Synthesis & Verification - Lecture 2 30 List Scheduling – Example 1b Assumptions – –Operations have different delay: del MULT = 2, del ALU = 1 – –Resource constraints: MULT: a 1 = 3, ALU: a 2 = 1 MUTL ALU start time {v 1, v 2, v 6 }v 10 1 --v 11 2 {v 3, v 7, v 8 }-- 3 ---- 4 --v 4 5 --v 5 6 --v 9 7 * NOP < + 1 2 3 4 5 6 7 8 + 9 10 11 n ***** T1 T2 T3 T4 T5 T6 T7

31. ECE 667 - Synthesis & Verification - Lecture 2 31 List Scheduling Algorithm (2) LIST_R(G c (V,E), L { % Minimize resources under latency constraint a = 1; Compute the latest possible starting times t L using ALAP scheduling if (t 0 L < 0) return  ; l = 1; repeat { for each resource type k = 1,2, …, N r {determine candidate operations U l,k ; compute the slacks { s i = t i L – l for all v i  U l,k }; schedule the candidate operations with zero slack and update vector a ; schedule the candidate operations requiring no additional resources ; } l = l +1 ; { until (v n is scheduled) return (t) }

32. ECE 667 - Synthesis & Verification - Lecture 2 32 List Scheduling – example 2 Assumptions – –All operations have unit delay – –Latency constraint: L = 4 – –No resource constraints Use slack information to guide the scheduling – –Schedule operations with slack = 0 first * NOP * * < * * + 1 2 3 4 5 6 7 * 8 + 9 10 11 0 n T1 T2 T3 T4

33. ECE 667 - Synthesis & Verification - Lecture 2 33 Scheduling – a Combinatorial Optimization Problem NP-complete ProblemNP-complete Problem Optimal solutions for special cases and ILPOptimal solutions for special cases and ILP Heuristics - iterative ImprovementsHeuristics - iterative Improvements Heuristics – constructiveHeuristics – constructive Various versions of the problemVarious versions of the problem Unconstrained, minimum latencyUnconstrained, minimum latency Resource-constrained, minimum latencyResource-constrained, minimum latency Timing-constrained, minimum latencyTiming-constrained, minimum latency Latency-constrained, minimum resourceLatency-constrained, minimum resource If all resources are identical, problem is reduced to multiprocessor scheduling (Hu’s algorithm)If all resources are identical, problem is reduced to multiprocessor scheduling (Hu’s algorithm) Minimum latency multiprocessor problem is intractableMinimum latency multiprocessor problem is intractable