1. 1 Progress on DC-DC converters for SiTracker for SLHC Yale University, New Haven, CT USA Brookhaven National Laboratory, Upton, NY USA Rutherford Appleton Laboratory, Chilton, Didcot, UK National Semiconductor Corp, Richardson, TX, USA New York University, New York, NY, USA

2. 2 4088 Cables 10 Chip Hybrid – SCT Module for LHC Counting House 3.5 V 20 Chip Hybrid – Si Tr Module for Hi Luminosity Cable Resistance = 4.5 Ohms 1.5 amps 2.4 amps X 10 DC-DC Power Converter 20 Chip Hybrid – Si Tr Module for Hi Luminosity 1.3 V 2.4 amps 10.25 V 12.1V 14.08 V 13 V Voltage Drop = 6.75 V Voltage Drop = 10.8V 0.24 amps Voltage Drop = 1.08 V Length of Power Cables = 140 Meters

3. 3 Agenda  Learning from Commercial Devices  Buck > Voltage, EMI  Plug In Cards for ABCN2.5 Hybrids - Noise Tests @Liverpool  Require Radiation resistance & High Voltage operation  Thin Oxide  High Voltage with Thin Oxide ?  DMOS, Drain Extension 12V @ 5 nm, 20V @ 7 nm  HEMT has no Oxide – Higher Voltage ? 200 Mrads 20V

4. 4 Enpirion EN5360  Found out at Power Technology conference 0.25 µm Lithography  Irradiated Stopped on St. Valentines Day 2007  No effects after 100 Mrads  Noise tests at Yale, RAL & BNL.  20 µm Al is good shield for Air Coils  All other devices failed, even other part numbers from Enpirion  We reported @ TWEPP 2008 - IHP was foundry for EN5360  What makes Radiation Hardness ?  Chinese Company Devices

5. 5 Controller Low Voltage Power Stage Drivers V reference Pulse Width Controller Buck Safety Synchronous Buck Converter Power Stage - High Volts Control Switch 30 mΩ Synch Switch 20 mΩ Control Switch: Switching Loss > I 2 Synch Switch: Rds Loss Significant Error Amp 100 ns Synch Control 900 ns Control Synch Minimum Switch ON Time Limits Max Frequency 500 ns Vout = 10% Vout = 50%

6. 6 Control Switch EMI Antenna Loops Current is switched from Q1 to Q2 with minimum Impedance change Since the switching noise is generated primarily by the power stage of the supply, careful layout of the power components should take place before the small signal components are placed and routed. The basic strategy is to minimize the area of the loops created by the power components and their associated traces. In the synchronous buck converter shown above the input (source) loop #1 ideally consists of a DC current with a negligible AC ripple. Loop numbers 2 and 3 are the power switch loops. The current in these loops is composed of trapezoidal pulses with large peaks and fast edges (di/dt and dv/dt). The area of these loops will be determined primarily by how close together the power components, the inductor, and the capacitors Cin and Cout can be placed. The closer the components, the shorter the PCB traces connecting them, and therefore the smaller loop area. Q2 Q1 Advice form a company application note

7. 7 Load 0.25 µm Technology Test ASIC 2.5 V @ ~ 3 amps. Actual 5 amps 0.13 µm Technology ASIC 1.3 V @ ? Vin = 2.5 – 17 V Vout = 2.5 / 1.3 V Enable Plug in Card – Power Yale Model 2151 GND Power Good Requirements Voltage Ratio > 8 For Good Efficiency Iout >3 amps Air Coil / Magnetics Radiation Hardness Small Plug-in Card Output Voltage Tolerance +/- 5% Absolute Max 10% For Long Lifetime

8. 8 4 layers Layer1: Top Coil with no connection - Shield Layer2: coil Connect in series Layer3: coil Connect in series Layer4: Bottom Coil with no connection- Shield Spacing between Layer 2 & 3 = 14 mills ( 0.35 MM) Proximity Effect Top & Bottom can be more as there is no loss from these Spiral Coils Resistance in mΩ TopBottom 3 Oz5746 10 mil Cu19.417 Coupled Inductor Connected in Series Shielded Buck Inductor Shielding Spiral – One end to GND

9. 9 Yale University April 09, 2009 Model 2151_Max8654 Yale University April 09, 2009 Power Out Power IN Enable / Disable Power Good Out Kelvin points for Vin & Vout

10. 10 PCB embedded Coil Copper Coils Solenoid

11. 11 Yale Model 2151a Plug In Card: DC-DC Powering 2 Different ICs 3 Different Coils Monolithic: 14V, 8A, 1.2MHz Multichip: 16V, 8A, 1.5MHz Embedded 3 oz Cu Etched Cu Foils 0.25 mm Solenoid without Ferrite CoilBoard #CommonPowerInput Noise Mode ChokeTo Dc_DCElectrons rms SolenoidMax # 2No 881 """ 885 Copper CoilIR # 17NoSwitching666 ""Yes"634 ""YesLinear664 EmbeddedMax 12NoLinear686 ""Yes"641 All Channels Trimmed ""Yes"648

12. 12 Sensor 1 cm from Coil Shield 20 µm Al FoilNoise NO change with Plug in card on top Noise Same with Linear or DC - DC

13. 13 Controller : Low Voltage High Voltage: Switches – LDMOS, Drain Extension, Deep Diffusion etc >> 20 Volts HEMT GaN on Silicon, Silicon Carbide, Sapphire Can We Have High Radiation Tolerance & Higher Voltage Together ???

14. 14 Thin Gate Oxide Book ‘Ionizing Radiation Effects in MOS Oxides’ Author Timothy R. Oldham Thin oxide implies lower operating voltage

15. 15 High performance RF LDMOS transistors with 5 nm gate oxide in a 0.25 μm SiGe:C BiCMOS technology: IHP Microelectronics Electron Devices Meeting, 2001. IEDM Technical Digest. International Electron Devices Meeting, 2001. IEDM Technical Digest. International 2-5 Dec. 2001 Page(s):40.4.1 - 40.4.4 LDMOS Structure Laterally Diffused Drain Extension High Voltage / high Frequency Main market. Cellular base stations

16. 16 R. Sorge et al, IHP Proceedings of SIRF 2008 Conference High Voltage Complementary Epi Free LDMOS Module with 70 V PLDMOS for a 0.25 μm SiGe:C BiCMOS Platform

17. 17 IBM Foundry Oxide Thickness LithographyProcessOperatingOxide NameVoltageThickness nm 0.25 µm6SF2.55 3.37 0.13 µm8RF1.2 & 1.52.2 2.2 & 3.35.2

18. 18 CompanyDeviceProcessFoundryOxideTime inDose beforeObservation Name/ Number NameThickness SecondsDamage seenDamage Mode Countrynm IHPASIC customSG25V GODIHP, Germany5 53 Mrad slight damage XySemiFET 2 ampsHVMOS20080720China7 52 Mrad minimal damage XySemiXP2201HVMOS20080720China7 In Development XySemiXPxxxx HVMOS20080720 China7 In Development Synch Buck XySemi XP5062 China 12.3 800 44 krad loss of V out regulation TI TPS54620LBC5 0.35 µm 20 420 23 krad abrupt failure IRIR3841 9 & 25230 13 Krads loss of Vout regulation EnpirionEN5365CMOS 0.25 µm Dongbu HiTek, Korea5 11,500 85 krad Increasing Input Current, EnpirionEN5382CMOS 0.25 µm Dongbu HiTek, Korea52000 111 Krads loss of V out regulation EnpirionEN5360 #2SG25V (IHP)IHP, Germany522 Days 100 MradsMinimal Damage EnpirionEN5360 #3SG25V (IHP)IHP, Germany510 Days 48 MradsMinimal Damage Non IBM Foundry ICs

19. 19 For Higher Radiation Resistance  Oxide Thickness is predominant Effect  Others Epi Free processing is Good ?  Oxide Processing is standard  ?????

20. 20 From China

21. 21

22. 22 Depletion Mode Normally ON Enhancement Mode Normally OFF

23. 23 GaN for Power Switching

24. 24 RF GaN 20 Volts & 0.1 amp  8 pieces: Nitronex NPT 25015: GaN on Silicon Done Gamma, Proton & Neutrons 65 volts Oct 2009  2 pieces: CREE CGH40010F: GaN on siC  6 pieces: Eudyna EGNB010MK: GaN on siC Done Neutrons Switch GaN  International Rectifier GaN on Silicon Under NDA Gamma: @ BNL Protons: @ Lansce Neutrons: @ U of Mass Lowell Gallium Nitride Devices under Tests Plan to Expose same device to Gamma, Protons & Neutrons

25. 25

26. 26 Source HEMT Pulse Generator 0.1 – 2 MHz 50 % Duty Cycle July 28. 2009 FET Setup for Proton Radiation Exposure @ LANSCE. ~ 0.070 Amps Power Supply V out = 20 Drain Gate 100 0 to -5 V Powered FET DMM DC mV 330 2 Watts 1 Ω GND 50 Ω Terminator 2 Shorted FETs G D S Pomona Box Reading = ~ 0.035 Amps @ 50% Duty Cycle No change in the average current for 200 Mega rads 30 meter Coax

27. 27 IR’s basic current GaN-on-Si based device structure is a high electron mobility transistor (HEMT), based on the presence of a two dimensional electron gas (2DEG) spontaneously formed by the intimacy of a thin layer of AlGaN on a high quality GaN surface as shown in Figure 1. It is obvious that the native nature of this device structure is a HFET with a high electron mobility channel and conducts in the absence of applied voltage (normally on). Several techniques have been developed to provide a built-in modification of the 2DEG under the gated region that permits normally off behavior. Aside from providing high quality, reliable and a low-cost CMOS compatible device manufacturing process, the GaNpowIR technology platform also delivers dramatic improvements in three basic figures of merit (FOMs), namely specific on- resistance RDS(on), RDS(on)*Qg and efficiency*density/cost.

28. 28 Intel won’t disclose any details till product is announced

29. 29 Conclusions  Learned from commercial Devices, Companies & Power conferences  Can get high Radiation Tolerance & Higher Voltage  High Frequency > Smaller Air coil > Less Material  Goal: ~20 MHz Buck, MEM on Chip size 9 mm x 9mm  Power SOC: MEMs Air Core Inductor on Chip  Study Feasibility 48 / 300V Converters  Irradiation: Run @ Max operating V & I.  Limit Power Dissipation by Switching duty cycle  Online Monitoring during irradiation for faster results  Yale Plug Cards can be loaned for Evaluation  Collaborators are Welcome

30. 30 The End Neither it on Top of the World Working on Power Supply Is not Glamorous