331 Week 3. 1Spring 2005 Review: MIPS Organization Processor Memory 32 bits 2 30 words read/write addr read data write data word address (binary) 0…0000.

331 Week 3. 1Spring 2005 Review: MIPS Organization Processor Memory 32 bits 2 30 words read/write addr read data write data word address (binary) 0…0000 0…0100 0…1000 0…1100 1…1100 Register File src1 addr src2 addr dst addr write data 32 bits src1 data src2 data 32 registers ($zero - $ra) 32 5 5 5 ALU 32 0123 7654 byte address (big Endian)  Arithmetic instructions – to/from the register file  Load/store word and byte instructions – from/to memory Fetch DecodeExec

331 Week 3. 2Spring 2005 Review: MIPS Instructions, so far CategoryInstrOp CodeExampleMeaning Arithmetic (R format) add0 and 32add $s1, $s2, $s3$s1 = $s2 + $s3 subtract0 and 34sub $s1, $s2, $s3$s1 = $s2 - $s3 Data transfer (I format) load word35lw $s1, 100($s2)$s1 = Memory($s2+100) store word43sw $s1, 100($s2)Memory($s2+100) = $s1 load byte32lb $s1, 101($s2)$s1 = Memory($s2+101) store byte40sb $s1, 101($s2)Memory($s2+101) = $s1

331 Week 3. 3Spring 2005  Decision making instructions l alter the control flow l i.e., change the "next" instruction to be executed  Why do we need decision making instructions? if (i==j) h = i + j;  MIPS conditional branch instructions: bne $s0, $s1, Label#go to Label if $s0  $s1 beq $s0, $s1, Label#go to Label if $s0=$s1  Example: if (i==j) h = i + j; Instructions for Making Decisions

331 Week 3. 4Spring 2005  Instructions: bne $s0, $s1, Label#go to Label if $s0  $s1 beq $s0, $s1, Label#go to Label if $s0=$s1  Machine Formats:  How is the branch destination address specified? Assembling Branches op rs rt 16 bit number I format 5 16 17 ???? 4 16 17 ???? 6 bits 5 bits

331 Week 3. 5Spring 2005 Specifying Branch Destinations bne $s0,$s1,Lab1 add $s3,$s0,$s1... Lab1:  Could specify the memory address  but that would require a 32 bit field

331 Week 3. 6Spring 2005 Specifying Branch Destinations  Could use a register (like lw and sw) and add to it the 16-bit offset l which register? -Instruction Address Register (PC = program counter) -its use is automatically implied by instruction -PC gets updated (PC+4) during the fetch cycle so that it holds the address of the next instruction bne $s0,$s1,Lab1 add $s3,$s0,$s1... Lab1+PC: PC l limits the offset to -2 15 to +2 15 -1 from the (instruction after the) branch instruction, but -most branches are local anyway (principle of locality) l One optimization -Each instruction is 4 bytes long, and only word address is necessary (multiple of 4) -We can right shift the offset by 2 bits (divided by 4), and store the value -Essentially, it can cover -2 17 to +2 17 -1 offset

331 Week 3. 7Spring 2005 Disassembling Branch Destinations  The contents of the updated PC (PC+4) is added to the low order 16 bits of the branch instruction which is converted into a 32 bit value by l concatenating two low-order zeros to create an 18 bit number l sign-extending those 18 bits  The result is written into the PC if the branch condition is true prior to the next Fetch cycle PC Add 32 offset 16 32 00 sign-extend from the low order 16 bits of the branch instruction branch dst address ? Add 4 32 Why??

331 Week 3. 8Spring 2005  Assembly code bne $s0, $s1, Lab1 add $s3, $s0, $s1 Lab1:...  Machine Format of bne : Assembling Branches Example op rs rt 16 bit offset I format 5 16 17  Remember After the bne instruction is fetched, the PC is updated to address the add instruction (PC = PC + 4). Two low-order zeros are concatenated to the offset number and that value sign-extended is added to the (updated) PC

331 Week 3. 9Spring 2005 MIPS Organization Processor Memory 32 bits 2 30 words read/write addr read data write data word address (binary) 0…0000 0…0100 0…1000 0…1100 1…1100 Register File src1 addr src2 addr dst addr write data 32 bits src1 data src2 data 32 registers ($zero - $ra) 32 5 5 5 PC ALU 32 0123 7654 byte address (big Endian) Fetch PC = PC+4 DecodeExec Add 32 4 Add 32 br offset

331 Week 3. 10Spring 2005  MIPS also has an unconditional branch instruction or jump instruction: j label#go to label  Example: if (i!=j) h=i+j; else h=i-j; Another Instruction for Changing Flow

331 Week 3. 11Spring 2005  Instruction: j label#go to label  Machine Format:  How is the jump destination address specified? l As an absolute address formed by -concatenating the upper 4 bits of the current PC (now PC+4) to the 26-bit address and -concatenating 00 as the 2 low-order bits Assembling Jumps op 26-bit address J format 2 ????

331 Week 3. 12Spring 2005 Disassembling Jump Destinations  to create a 32 bit instruction address that is placed into the PC prior to the next Fetch cycle PC 32 26 32 00 from the low order 26 bits of the jump instruction

331 Week 3. 13Spring 2005  Assemble the MIPS machine code (in decimal is fine) for the following code sequence. Assume that the address of the beq instruction is 0x00400020 (hex address) beq$s0, $s1, Lab1 add$s3, $s0, $s1 jLab2 Lab1:sub$s3, $s0, $s1 Lab2:... Assembling Branches and Jumps

331 Week 3. 14Spring 2005 Compiling While Loops  Compile the assembly code for the C while loop where i is in $s0, j is in $s1, and k is in $s2 while (i!=k) i=i+j;

331 Week 3. 15Spring 2005  We have beq, bne, but what about branch-if-less- than?  New instruction: slt $t0, $s0, $s1 # if $s0 < $s1 #then # $t0 = 1 #else # $t0 = 0  Machine format: 2 More Instructions for Making Decisions op rs rt rd funct 0 16 17 8 0 42 = 0x2a

331 Week 3. 16Spring 2005 Other Branch Instructions  Can use slt, beq, bne, and the fixed value of 0 in register $zero to create all relative conditions less than blt $s1, $s2, Label less than or equal to ble $s1, $s2, Label greater than bgt $s1, $s2, Label great than or equal to bge $s1, $s2, Label  As pseudo instructions (get to practice with some of them in HW#2) - recognized (and expanded) by the assembler  The assembler needs a reserved register ( $at ) l there are policy of use conventions for registers

331 Week 3. 17Spring 2005  Most higher level languages have case or switch statements allowing the code to select one of many alternatives depending on a single value.  Instruction: jr $t1#go to address in $t1  Machine format: 2 Another Instruction for Changing Flow op rs funct 0 9 0 0 0 8 = 0x08

331 Week 3. 18Spring 2005 Compiling a Case (Switch) Statement switch (k) { case 0: h=i+j; break; /*k=0*/ case 1: h=i+h; break; /*k=1*/ case 2: h=i-j; break; /*k=2*/

331 Week 3. 19Spring 2005 Instructions, so far CategoryInstrOp CodeExampleMeaning Arithmetic (R format) add0 and 32add $s1, $s2, $s3$s1 = $s2 + $s3 subtract0 and 34sub $s1, $s2, $s3$s1 = $s2 - $s3 Data transfer (I format) load word35lw $s1, 100($s2)$s1 = Memory($s2+100) store word43sw $s1, 100($s2)Memory($s2+100) = $s1 load byte32lb $s1, 101($s2)$s1 = Memory($s2+101) store byte40sb $s1, 101($s2)Memory($s2+101) = $s1 Cond. Branch br on equal4beq $s1, $s2, Lif ($s1==$s2) go to L br on not equal5bne $s1, $s2, Lif ($s1 !=$s2) go to L set on less than0 and 42slt $s1, $s2, $s3if ($s2<$s3) $s1=1 else $s1=0 Uncond. Jump jump2j 2500go to 10000 jump register0 and 8jr $t1go to $t1 jump and link3jal 2500go to 10000; $ra=PC+4

331 Week 3. 20Spring 2005 Logic Operations  Logic operations operate on individual bits of the operand. $t2 = 0…0 0000 1101 0000 $t1 = 0…0 0011 1100 0000 and $t0, $t1, $t2$t0 = or $t0, $t1 $t2$t0 = xor $t0, $t1, $t2$t0 = nor $t0, $t1, $t2$t0 =

331 Week 3. 21Spring 2005 Logical Operations - Shifts  They move all the bits in a word to the left or right, filling the emptied bits with 0s. l sll $t2, $s0, 4 # shift left l srl $t2, $s0, 4 # shift right 00161040 oprsrtrdshamtfunct  Shifting left by i bits gives the same result as multiplying by 2i.

331 Week 3. 22Spring 2005 Procedures int leaf_example (int g, int h, int i, int j) { int f; f = (g+h) – (i+j); return f; } void main(){ int f; f = leaf_example(1, 2, 3, 4); f ++; } CALLEE CALLER

331 Week 3. 23Spring 2005 Six Steps in Execution of a Procedure  Main routine (caller) places actual parameters in a place where the procedure (callee) can access them l $a0 - $a3: four argument registers  Caller transfers control to the callee  Callee acquires the storage resources needed  Callee performs the desired task  Callee places the result value in a place where the caller can access it l $v0 - $v1: two value registers for result values  Callee returns control to the caller l $ra: one return address register to return to the point of origin

331 Week 3. 24Spring 2005  MIPS procedure call instruction (caller): jalProcedureAddress#jump and link l Saves PC+4 in register $ra l Jump to address ProcedureAddress  Then (callee) can do procedure return with just Instruction for Calling a Procedure jr$ra#return

331 Week 3. 25Spring 2005 Compiling a Procedure int leaf_example (int g, int h, int i, int j) { int f; f = (g+h) – (i+j); return f;}

331 Week 3. 26Spring 2005 MIPS Register Convention NameRegister Number UsageShould preserve on call? $zero0the constant 0no $v0 - $v12-3returned valuesno $a0 - $a34-7argumentsyes $t0 - $t78-15temporariesno $s0 - $s716-23saved valuesyes $t8 - $t924-25temporariesno $gp28global pointeryes $sp29stack pointeryes $fp30frame pointeryes $ra31return addressyes

331 Week 3. 27Spring 2005 Spilling Registers  Where does the callee save those registers? l it uses a stack – a last-in-first-out queue low addr high addr $sp  One of the general registers, $sp, is used to address the stack (which “grows” from high address to low address) l add data onto the stack – push $sp = $sp – 4 data on stack at new $sp l remove data from the stack – pop data from stack at $sp $sp = $sp + 4 top of stack

331 Week 3. 28Spring 2005  MIPS instruction for adding immediate values: addi$sp, $sp, 4#$sp = $sp + 4 addi$sp, $sp, -4#$sp = $sp - 4  Another version of add in which one operand is a constant where the constant is kept inside the instruction itself  MIPS pseudoinstruction for multiplying: mul$v0, $a0, $v0#$v0 = $a0 * $v0  We will look at the machine representations for these instructions in the next lecture A Quick Aside

331 Week 3. 29Spring 2005 Nested Procedures  What happens to return addresses with nested procedures? int rt_1 (int i) { if (i == 0) return 0; else return rt_2(i-1); } caller:jalrt_1 next:... rt_1:bne$a0, $zero, to_2 add$v0, $zero, $zero jr$ra to_2:addi$a0, $a0, -1 jalrt_2 jr$ra rt_2:...

331 Week 3. 30Spring 2005 Nested Procedures Outcome caller:jalrt_1 next:... rt_1:bne$a0, $zero, to_2 add$v0, $zero, $zero jr$ra to_2:addi$a0, $a0, -1 jalrt_2 jr$ra rt_2:...  On the call to rt_1, the return address ( next in the caller routine) gets stored in $ra. What happens to the value in $ra (when i != 0 ) when rt_1 makes a call to rt_2 ?

331 Week 3. 31Spring 2005 Saving the Return Address  Nested procedures ( i passed in $a0, return value in $v0 ) rt_1:bne$a0, $zero, to_2 add$v0, $zero, $zero jr$ra to_2:addi$sp, $sp, -8 sw$ra, 4($sp) sw$a0, 0($sp) addi$a0, $a0, -1 jalrt_2 bk_2:lw$a0, 0($sp) lw$ra, 4($sp) addi$sp, $sp, 8 jr$ra  Save the return address (and arguments) on the stack low addr high addr  $sp $ra old TOS

331 Week 3. 32Spring 2005 Compiling a Recursive Procedure  Calculating factorial: int fact (int n) { if (n < 1) return 1; else return (n * fact (n-1)); }  Recursive procedure (one that calls itself!) fact (0) = 1 fact (1) = 1 * 1 = 1 fact (2) = 2 * 1 * 1 = 2 fact (3) = 3 * 2 * 1 * 1 = 6 fact (4) = 4 * 3 * 2 * 1 * 1 = 24...  Assume n is passed in $a0 ; result returned in $v0

331 Week 3. 33Spring 2005 Compiling a Recursive Procedure fact:addi$sp, $sp, -8#adjust stack pointer sw$ra, 4($sp)#save return address sw$a0, 0($sp)#save argument n slt$t0, $a0, 1#test for n < 1 beq$t0, $zero, L1#if n >=1, go to L1 addi$v0, $zero, 1#else return 1 in $v0 addi$sp, $sp, 8#adjust stack pointer jr$ra#return to caller L1:addi$a0, $a0, -1#n >=1, so decrement n jalfact#call fact with (n-1) #this is where fact returns bk_f:lw$a0, 0($sp)#restore argument n lw$ra, 4($sp)#restore return address addi$sp, $sp, 8#adjust stack pointer mul$v0, $a0, $v0#$v0 = n * fact(n-1) jr$ra#return to caller

331 Week 3. 34Spring 2005 A Look at the Stack for $a0 = 2  $sp $ra $a0 $v0 old TOS

331 Week 3. 35Spring 2005 Review: MIPS Instructions, so far CategoryInstrOp CodeExampleMeaning Arithmetic (R format) add0 and 32add $s1, $s2, $s3$s1 = $s2 + $s3 subtract0 and 34sub $s1, $s2, $s3$s1 = $s2 - $s3 Data transfer (I format) load word35lw $s1, 100($s2)$s1 = Memory($s2+100) store word43sw $s1, 100($s2)Memory($s2+100) = $s1 load byte32lb $s1, 101($s2)$s1 = Memory($s2+101) store byte40sb $s1, 101($s2)Memory($s2+101) = $s1 Cond. Branch br on equal4beq $s1, $s2, Lif ($s1==$s2) go to L br on not equal5bne $s1, $s2, Lif ($s1 !=$s2) go to L set on less than0 and 42slt $s1, $s2, $s3if ($s2<$s3) $s1=1 else $s1=0 Uncond. Jump jump2j 2500go to 10000 jump register0 and 8jr $t1go to $t1 jump and link3jal 2500go to 10000; $ra=PC+4

331 Week 3. 1Spring 2005 Review: MIPS Organization Processor Memory 32 bits 2 30 words read/write addr read data write data word address (binary) 0…0000.

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331 Week 3. 1Spring 2005 Review: MIPS Organization Processor Memory 32 bits 2 30 words read/write addr read data write data word address (binary) 0…0000.

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Presentation on theme: "331 Week 3. 1Spring 2005 Review: MIPS Organization Processor Memory 32 bits 2 30 words read/write addr read data write data word address (binary) 0…0000."— Presentation transcript:

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