# Parity. 2 Datasheets TTL:  CMOS: 

## Presentation on theme: "Parity. 2 Datasheets TTL:  CMOS: "— Presentation transcript:

Parity

2 Datasheets TTL:  http://www.techlearner.com/C&D/index.htm CMOS:  http://fenix.student.utwente.nl/~fenix/datasheets_4000.html

3 Parity Generation and Checking Parity:  The number of 1’s in a bit stream. Application:  Error detection and correction. Parity generator:  the circuit that generates the parity bit before transmitting. Parity checker:  the circuit that checks the parity in the receiver.

4 Parity Generation - Example  P(X,Y,Z) must produce a 1 for all the input combinations that contain an odd number of 1s  Thus, it is a 3-input odd function P = X  Y  Z

5 Parity Checking - Example (cont.)  How would you implement a parity checker for the previous example? X  Y  Z  PUse a 4-input XOR circuit (another odd function) C = X  Y  Z  P  1 indicates an error OR X  Y  Z  P)’A 4-input XNOR circuit (even function) C = (X  Y  Z  P)’  1 indicates a pass

6 XOR

7 Parity Circuits Daisy Chain Tree