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CS 213 Commercial Multiprocessors. Origin2000 System – Shared Memory Directory state in same or separate DRAMs, accessed in parallel Upto 512 nodes (1024.

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Presentation on theme: "CS 213 Commercial Multiprocessors. Origin2000 System – Shared Memory Directory state in same or separate DRAMs, accessed in parallel Upto 512 nodes (1024."— Presentation transcript:

1 CS 213 Commercial Multiprocessors

2 Origin2000 System – Shared Memory Directory state in same or separate DRAMs, accessed in parallel Upto 512 nodes (1024 processors) With 195MHz R10K processor, peak 390MFLOPS or 780 MIPS per proc Peak SysAD bus bw is 780MB/s, so also Hub-Mem Hub to router chip and to Xbow is 1.56 GB/s (both are off-board)

3 Origin Network Each router has six pairs of 1.56MB/s unidirectional links –Two to nodes, four to other routers –latency: 41ns pin to pin across a router Flexible cables up to 3 ft long Four “virtual channels”: request, reply, other two for priority or I/O

4 Cray T3D – Shared Memory Build up info in ‘shell’ Remote memory operations encoded in address

5 IBM Power 4 – Shared Memory

6 Power-4 Multi-chip Module

7 32-way SMP

8 NOW – Message Passing General purpose processor embedded in NIC to implement VIA – to be discussed later

9 Myrinet – Message Passing

10 Interface Processor

11 InfiniBand – Message Passing

12 Latency Comparison

13 Cray XD1 – Message Passing Four chassis, each holding six blades, each containing a dual (quad) 2.4 GHz AMD Opteron motherboard with 4GB of RAM and one 74 GB hard disk. The interconnection topology, shown in Fig. 1 has three levels of latencies: 1.communication time between the CPUs inside one blade is through shared memory 2.very fast message passing communication among blades within a chassis, 3.slower message passing communication between two different chassis

14 Latency Comparison

15 Dual (Quad) SMP and Hardware Accelerator

16 IBM SP2 – Message Passing

17


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