1. Thumb Data Processing Instructions and Breakpoint Instructions 02/18/2015 Mingliang Ge Yi (Leo) Wu Xinuo (Johnny) Zhao

2. Overview ●Data processing instructions ○ Binary encoding and Assembler format ○ Equivalent ARM instructions ●Breakpoint instructions

3. ARM vs. Thumb data processing instructions

4. ●bit 10 toggles register/immediate operand ●bit 9: 0 - ADD, 1 - SUB ●3 bit immediate value ●3 bit to represent registers ●Rn (+ or -) Rm -> Rd ●Rn (+ or -) #imm3 -> Rd

5. ●2 bit opcode ○0 - MOV ○1 - CMP ○2 - ADD ○3 - SUB ●8 bit immediate value ●Register is also the destination register

6. ●5 bit immediate value for shift offset ●2 bit opcode: ○0 - LSL ○1 - LSR ○2 - ASR ○reason not having 3?

7. ●4 bit opcode ○0 - AND ○1 - EOR ○2 - LSL ○3 - LSR ○4 - ASR ○5 - ADC ○6 - SBC ○7 - ROR ○8 - TST ○9 - NEG ○10 - CMP ○11 - CMN ○12 - ORR ○13 - MUL ○14 - BIC ○15 - MVN

8. ●D,M bits: operand flags indicating whether Rm or Rd is a ’Hi’ register (r8-r15) ●2 bit opcode: ○0 - ADD ○1 - CMP ○2 - MOV ○3 - BX (review previous lectures)

9. ●R bit: ○0 - PC ○1 - SP ●(PC or SP) + #imm8 -> Rd ●8 bit immediate value ●A bit: ○0 - ADD ○1 - SUB ●SP (+ or -) #imm7 -> SP ●7 bit immediate value

11. ARM instructionsTHUMB instructions MOVS Rd, # MOV Rd, # MVNS Rd, # MVN Rd, Rm CMP Rd, # CMP Rn, # CMP Rn, Rm TST Rn, Rm ADDS Rd, Rn, # ADD Rd, Rn, # ADDS Rd, Rd, # ADD Rd, # ADDS Rd, Rn, RmADD Rd, Rn, Rm ADCS Rd, Rd, RmADC Rd, Rm SUBS Rd, Rn, # SUB Rd, Rn, # SUBS Rd, Rd, # SUB Rd, # SUBS Rd, Rn, RmSUB Rd, Rn, Rm SBCS Rd, Rd, RmSBC Rd, Rm RSBS Rd, Rn, #0NEG Rd, Rn ●Instructions that uses the ‘Lo’, general-purpose registers (r0 - r7)

12. ARM instructionsTHUMB instructions MOVS Rd, Rm, LSL # LSL Rd, Rm, # MOVS Rd, Rd, LSL RsLSL Rd, Rs MOVS Rd, Rm, LSR # LSR Rd, Rm # MOVS Rd, Rd, LSR RsLSR Rd, Rs MOVS Rd, Rm, ASR # ASR Rd, Rm, # MOVS Rd, Rd, ASR RsASR Rd, Rs MOVS Rd, Rd, ROR RsROR Rd, Rs ANDS Rd, Rd, RmAND Rd, Rm EORS Rd, Rd, RmEOR Rd, Rm ORRS Rd, Rd, RmORR Rd, Rm BICS Rd, Rd, RmBIC Rd, Rm MULS Rd, Rm, RdMUL Rd, Rm ●Instructions that uses the ‘Lo’, general-purpose registers (r0 - r7):

13. ARM instructionsTHUMB instructions ADD Rd, Rd, RmADD Rd, Rm (1/2 Hi regs) CMP Rn, RmCMP Rn, Rm (1/2 Hi regs) MOV Rd, RmMOV Rd, Rm (1/2 Hi regs) ADD Rd, PC, # ADD Rd, SP, # ADD SP, SP, # SUB SP, SP, # ●Instructions that operate with or on the ‘Hi’ registers (r8 - r15), in some cases in combination with a ‘Lo’ register:

14. Breakpoint ●Binary encoding ○ ARM ○ Thumb ●Assembly format ○ BKPT (identical)