1. Registers.1

2. Register  Consists of N Flip-Flops  Stores N bits  Common clock used for all Flip-Flops Shift Register  A register that provides the ability to shift its contents (either left or right).  Must use Flip-Flops Either edge-triggered or master-slave  Cannot use Level-sensitive Gated Latches.2

3. 4-bit Register Registers.3

4. .4

5. 4-bit Register with Parallel Load Registers.5

6. 2-to-1 Multiplexer.6

7. 4-bit Serial-In Serial-Out Shift Register Registers.7

8. 4-bit SI/SO Shift Register common clock Edge-triggered Flip-Flop.8

9. Parallel-In Parallel-Out Shift Register Registers.9

10. Parallel-In Parallel-Out Bi-directional Shift Register Registers.10

11. 4-bit PI/PO Bi-directional Shift Register.11

12. Acknowledgments The slides used in this lecture were taken, with permission, from those provided by Pearson Prentice Hall for Digital Design (4 th Edition). They are the property of and are copyrighted by Pearson Education..12

13. .13 Introduction  Sequential circuits has an extra dimension – time.  Combinational circuit output depends only on the present inputs  Sequential circuit output depends on the history of past inputs as well  More powerful than combinational circuit, able to model situations that cannot be modeled by combinational circuits  Building blocks of synchronous sequential logic circuits: gates and flip-flops.  Flip-flops make up the memory M while the gates form one or more combinational subcircuits C 1, C 2, …, C q.

14. 14 Flip-flop Characteristic Tables  Each type of flip-flop has its own behavior. The characteristic tables for the various types of flip-flops are shown below: JK Flip-flopSR Flip-flop D Flip-flopT Flip-flop

15. . 15 Sequential Circuit Analysis  Given a sequential circuit diagram, analyze its behaviour by deriving its state table and hence its state diagram.  Requires state equations to be derived for the flip- flop inputs, as well as output functions for the circuit outputs other than the flip-flops (if any).  We use A(t) and A(t+1) to represent the present state and next state, respectively, of a flip-flop represented by A.  Alternatively, we could simply use A and A + for the present state and next state respectively.

16. .16 Sequential Circuit Analysis  Example (using D flip-flops): State equations: A + = A.x + B.x B + = A'.x Output function: y = (A + B).x' A A' B B' y x CP D Q Q' D Q Figure 1.

17. .17 Sequential Circuit Analysis  From the state equations and output function, we derive the state table, consisting of all possible binary combinations of present states and inputs.  State table  Similar to truth table.  Inputs and present state on the left side.  Outputs and next state on the right side.  m flip-flops and n inputs  2 m+n rows.

18. .18 Sequential Circuit Analysis  State table for the circuit of Figure 1: State equations: A + = A.x + B.x B + = A'.x Output function: y = (A + B).x'

19. .19 Sequential Circuit Analysis  Alternate form of state table:

20. .20 Sequential Circuit Analysis  From the state table, we can draw the state diagram.  State diagram  Each state is denoted by a circle.  Each arrow (between two circles) denotes a transition of the sequential circuit (a row in state table).  A label of the form a/b is attached to each arrow where a denotes the inputs while b denotes the outputs of the circuit in that transition.  Each combination of the flip-flop values represents a state. Hence, m flip-flops  up to 2 m states.

21. .21 Sequential Circuit Analysis  State diagram of the circuit of Figure 1: 00 01 11 10 1/0 0/1 0/0 1/00/1

22. .22 Flip-flop Input Functions  The outputs of a sequential circuit are functions of the present states of the flip-flops and the inputs. These are described algebraically by the circuit output functions.  In Figure 1: y = (A + B).x'  The part of the circuit that generates inputs to the flip-flops are described algebraically by the flip-flop input functions (or flip-flop input equations).  The flip-flop input functions determine the next state generation.  From the flip-flop input functions and the characteristic tables of the flip-flops, we obtain the next states of the flip-flops.

23. .23 Flip-flop Input Functions  Example: circuit with a JK flip-flop.  We use 2 letters to denote each flip-flop input: the first letter denotes the input of the flip-flop (J or K for JK flip-flop, S or R for SR flip-flop, D for D flip- flop, T for T flip-flop) and the second letter denotes the name of the flip-flop. A B C' x ByBy CP J Q Q' K B' C x' JA = B.C'.x + B'.C.x’ KA = B + y

24. .24 Flip-flop Input Functions  In Figure 1, we obtain the following state equations by observing that Q + = DQ for a D flip-flop: A + = A.x + B.x (since DA = A.x + B.x) B + = A'.x (since DB = A'.x) A A' B B' y x CP D Q Q' D Q Figure 1.

25. .25 Analysis: Example #2  Given Figure 2, a sequential circuit with two JK flip- flops A and B, and one input x.  Obtain the flip-flop input functions from the circuit: JA = BJB = x' KA = B.x'KB = A'.x + A.x' = A  x A B x CP J Q Q' K J Q K Figure 2.

26. .26 Analysis: Example #2  Flip-flop input functions: JA = BJB = x' KA = B.x'JB = A'.x + A.x' = A  x  Fill the state table using the above functions, knowing the characteristics of the flip-flops used. 0 1 0 1 1 0 1 1 0 0 1

27. .27 Analysis: Example #2  Draw the state diagram from the state table. 00 01 10 11 1 0 1 0 0 1 0 1

28. .28 Analysis: Example #3  Derive the state table and state diagram of the following circuit.  Flip-flop input functions: JA = BJB = KB = (A  x)' = A.x + A'.x' KA = B' J Q Q' K J Q K A x CP B y Figure 3.

29. .29 Analysis: Example #3  Flip-flop input functions: JA = BJB = KB = (A  x)' = A.x + A'.x' KA = B'  State table: 0 1 0 1 0 1 0 0 1 1 1 0

30. .30 Analysis: Example #3  State diagram: 00 01 11 10 1/1 1/0 0/1 1/1 0/0 1/0

31. .31 Flip-flop Excitation Tables  Analysis: Starting from a circuit diagram, derive the state table or state diagram.  Design: Starting from a set of specifications (in the form of state equations, state table, or state diagram), derive the logic circuit.  Characteristic tables are used in analysis.  Excitation tables are used in design.

32. .32 Flip-flop Excitation Tables  Excitation tables: given the required transition from present state to next state, determine the flip-flop input(s). JK Flip-flopSR Flip-flopD Flip-flopT Flip-flop

33. .33 Sequential Circuit Design  Design procedure:  Start with circuit specifications – description of circuit behaviour.  Derive the state table.  Perform state reduction if necessary.  Perform state assignment.  Determine number of flip-flops and label them.  Choose the type of flip-flop to be used.  Derive circuit excitation and output tables from the state table.  Derive circuit output functions and flip-flop input functions.  Draw the logic diagram.

34. .34 Design: Example #1  Given the following state diagram, design the sequential circuit using JK flip-flops. 00 10 11 0 0 0 0 1 1 1 1 01

35. .35 Design: Example #1  Circuit state/excitation table, using JK flip-flops. 00 10 11 0 0 0 01 11 1 01 0 X 1 X 0 X X 0 X 1 0 X 1 X X 1 X 0 0 X 1 X X 0 X 1 JK Flip-flop’s excitation table.

36. .36 Design: Example #1  Block diagram. Combinational circuit A' A B B' x KAJAKBJB BB’AA’ External input(s) CP External output(s) (none) J QQ' KJ Q K What are to go in here?

37. .37 Design: Example #1  From state table, get flip-flop input functions. A B 0 10 1 00 01 11 10 x A Bx XXXX 1 JA = B.x'JB = x A B 0 10 1 00 01 11 10 x A Bx X 1XX X1 KA = B.x A B 0 10 1 00 01 11 10 x A Bx X 1 XXX KB = (A  x)' A B 0 10 1 00 01 11 10 x A Bx X1 X1X X

38. .38 Design: Example #1  Flip-flop input functions. JA = B.x'JB = x KA = B.xKB = (A  x)'  Logic diagram: x B A CP J QQ' KJ Q K

39. .39 Design: Example #2  Design, using D flip-flops, the circuit based on the state table below. (Exercise: Design it using JK flip-flops.)

40. .40 Design: Example #2  Determine expressions for flip-flop inputs and the circuit output y. DA(A, B, x) =  m(2,4,5,6) DB(A, B, x) =  m(1,3,5,6) y(A, B, x) =  m(1,5) DA = A.B' + B.x' A B 0 10 1 00 01 11 10 x A Bx 111 1 DB = A'.x + B'.x + A.B.x' A B 0 10 1 00 01 11 10 x A Bx 1 11 1 A B 0 10 1 00 01 11 10 x A Bx 1 1 y = B'.x

41. .41 Design: Example #2  From derived expressions, draw logic diagram: DA = A.B' + B.x' DB = A'.x + B'.x + A.B.x' y = B'.x D Q Q' D Q A A' B B' y CP x

42. .42 Design: Example #3  Design with unused states. Given theseDerive these Unused state 000:

43. .43 Design: Example #3  From state table, obtain expressions for flip-flop inputs. A C 00 01 11 10 00 01 11 10 x AB Cx 11 B X X XX X XX X X SA = B.x A C 00 01 11 10 00 01 11 10 x AB Cx 1 B X X X X X XX X X X RA = C.x' B A C 00 01 11 10 00 01 11 10 x AB Cx 1X X X X XXX SB = A'.B'.x RB = B.C + B.x' A C 00 01 11 10 00 01 11 10 x AB Cx B X X X 1 X XXX 1 XXXX 1

44. .44 Design: Example #3  From state table, obtain expressions for flip-flop inputs (cont’d). A C 00 01 11 10 00 01 11 10 x AB Cx 1 1 B X X X X X XX X X SC = x' A C 00 01 11 10 00 01 11 10 x AB Cx 1 B X X 1X X XX 1 X X RC = x y = A.x B A C 00 01 11 10 00 01 11 10 x AB Cx 1 X X X XXX 1

45. .45 Design: Example #3  From derived expressions, draw logic diagram: SA = B.xSB = A'.B'.xSC = x' RA = C.x'RB = B.C + B.x'RC = x y = A.x A A' B B' y CP x S Q Q' R S Q R S Q R C

46. .46 Design of Synchronous Counters  Counter: a sequential circuit that cycles through a sequence of states.  Binary counter: follows the binary sequence. An n-bit binary counter (with n flip-flops) counts from 0 to 2 n -1.  Example 1: A 3-bit binary counter (using T flip-flops). 001 000 111 010 011 100 110 101

47. .47 Design of Synchronous Counters  3-bit binary counter (cont’d). TA 2 = A 1.A 0 A2A2 A1A1 A0A0 1 1 TA 1 = A 0 TA 0 = 1 A2A2 A1A1 A0A0 1 11 1 A2A2 A1A1 A0A0 111 1111 1

48. .48 Design of Synchronous Counters  3-bit binary counter (cont’d). TA 2 = A 1.A 0 TA 1 = A 0 TA 0 = 1 1 A2A2 CP T Q T Q T Q A1A1 A0A0

49. .49 Design of Synchronous Counters  Example 2: Counter with non-binary sequence: 000  001  010  100  101  110 and back to 000 001 000 010 100 110 101 JA = BJB = CJC = B' KA = BKB = 1KC = 1

50. .50 Design of Synchronous Counters  Counter with non-binary sequence (cont’d). JA = BJB = CJC = B' KA = BKB = 1KC = 1 CP A 1 J QQ' KJ Q KJ Q K BC 001 000 010 100 110 101 111 011

51. .51 Summary  Sequential circuits have memory and they are more powerful than combinational circuits.  Analyzing sequential circuits  Flip-flop characteristic table  State Table  State diagram  Designing sequential circuits  Flip-flop excitation table  State assignment  Circuit output function  Flip-flop input function