1. 1 COMP541 Wrap Up Montek Singh Nov 24, 2014

2. Conclusion of this course  What did we learn this semester? Combinational logic Combinational logic Sequential logic, finite-state machines Sequential logic, finite-state machines Basic building blocks Basic building blocks  registers, counters, adders, subtractors, ALUs  memories, and memory-mapped I/O  controllers, encoders, decoders Hardware Description Language: Verilog Hardware Description Language: Verilog  hierarchical design  display interfaces, input devices, debouncing CPUs CPUs  single-cycle, multicycle  pipelining, hazards, forwarding, stalling  Built an entire MIPS CPU! 2

3. Timeline  Mon, Dec 1 & Wed, Dec 3 (class) Each student demos the final app (3-4 min slots) Each student demos the final app (3-4 min slots)  20 demos on Dec 1, and 20 demos on Dec 3  fully functioning MIPS + display + input device –any other optional device you chose  fully functioning final app Others (faculty, staff, students) may attend as well Others (faculty, staff, students) may attend as well  Mon Dec 8, 12-3pm: Final Exam Everything we studied this semester is included Everything we studied this semester is included But: greater emphasis on post-midterm material But: greater emphasis on post-midterm material 3