# Introduction to Integer Arithmetic

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Introduction to Integer Arithmetic

Suggested Reading Computer Arithmetic – Behrooz Parhami – Oxford Press, pages (Basic Division Schemes); pages (Division by Convergence) and pages (Square-Rooting Methods) Computer Arithmetic – Digital Computer Arithmetic – Joseph F. F. Cavanagh – McGraw-Hill Computer Arithmetic Simulator by Israel Koren.

Topics Numeric Encodings Unsigned & Two’s complement Programming Implications C promotion rules Basic operations Addition, negation, multiplication Consequences of overflow Using shifts to perform power-of-2 multiply/divide

Number Range Xmin Xmax(check!) Number system Decimal
X = (xk-1 xk-2 … x1 x0.x-1 … x-l)10 10k - 10-l Binary X = (xk-1 xk-2 … x1 x0.x-1 … x-l)2 2k - 2-l Conventional fixed-radix X = (xk-1 xk-2 … x1 x0.x-1 … x-l)r rk - r-l Notation: Unit in the least significant position Unit in the last position ulp = r-l

Most Used Representation
Representations of signed numbers Biased Signed-magnitude Complement [-8, +7] -> [0,15] F.P. Exponent Diminished-radix complement (Digit complement) Radix-complement r = 2 r = 2 Two’s complement One’s complement Most Used Representation

Signed- magnitude Two’s complement One’s complement
Biased

Encoding Integers Unsigned Two’s Complement Sign Bit
short int x = ; short int y = ; Sign Bit C short 2 bytes long Sign Bit For 2’s complement, most significant bit indicates sign 0 for nonnegative (or positive) 1 for negative

Encoding Example (Cont.)
y = :

Numeric Ranges Unsigned Values UMin = 0 UMax = 2w – 1
000…0 UMax = 2w – 1 111…1 Two’s Complement Values TMin = –2w–1 100…0 TMax = 2w–1 – 1 011…1 Other Values Minus 1(-1) 111…1 Values for W = 16

Values for Different Word Sizes
Observations |TMin | = TMax + 1 Asymmetric range UMax = 2 * TMax + 1 C Programming  #include <limits.h> K&R App. B11 Declares constants, e.g.,  ULONG_MAX  LONG_MAX  LONG_MIN Values platform-specific

Unsigned & Signed Numeric Values
X B2T(X) B2U(X) 0000 0001 1 0010 2 0011 3 0100 4 0101 5 0110 6 0111 7 –8 8 –7 9 –6 10 –5 11 –4 12 –3 13 –2 14 –1 15 1000 1001 1010 1011 1100 1101 1110 1111 Equivalence Same encodings for nonnegative values Uniqueness Every bit pattern represents unique integer value Each representable integer has unique bit encoding

Casting Signed to Unsigned
C Allows Conversions from Signed to Unsigned Resulting Value No change in bit representation Nonnegative values unchanged ux = 15213 Negative values change into (large) positive values ! ! uy = 50323 short int x = ; unsigned short int ux = (unsigned short) x; short int y = ; unsigned short int uy = (unsigned short) y;

Signed vs. Unsigned in C Constants Casting
By default are considered to be signed integers Unsigned if have “U” as suffix 0U, U Casting Explicit casting between signed & unsigned same as U2T and T2U int tx, ty; unsigned ux, uy; tx = (int) ux; uy = (unsigned) ty; Implicit casting also occurs via assignments and procedure calls tx = ux; uy = ty;

Sign Extension Task: Rule: Given w-bit signed integer x
Convert it to w+k-bit integer with same value Rule: Make k copies of sign bit: X  = xw–1 ,…, xw–1 , xw–1 , xw–2 ,…, x0 • • • X X  w k k copies of MSB

Sign Extension Example
short int x = ; int ix = (int) x; short int y = ; int iy = (int) y; Decimal Hex Binary x 15213 3B 6D ix B 6D y -15213 C4 93 iy FF FF C4 93 Converting from smaller to larger integer data type C automatically performs sign extension

Negating with Complement & Increment
Claim: Following Holds for 2’s Complement ~x + 1 == -x Complement Observation: ~x + x == 1111…112 == -1 Increment ~x + x + (-x + 1) == -1 + (-x + 1) (Adding (-x +1) on both sides of equation ) ~x + 1 == -x 1 x ~x + -1

Comp. & Incr. Examples x = 15213

Unsigned Addition u • • • Operands: w bits + v • • • True Sum: w+1 bits u + v • • • Discard Carry: w bits UAddw(u , v) • • • Standard Addition Function Ignores carry output

Class Exercise - 1 Suppose that you have a number (positive or negative) represented in two´s complement, using 4 bits of word length. Specify the steps which are necessary to perform fast division by 2 and obtain the correct result for positive and negative numbers. Remember that arithmetic shift operations are shifts where the sign bit is propagated from right to left. Think about 4-bit numbers in two’s complement, that is they are in the range [-8 to +7].

Carry and Overflow Detection in Software for Two´s Complement Arithmetic
Sign Sign Carry-in Overflow A i-1 B i Cyin i Ovf i Ovf i = Ai-1.Bi-1.Cyini-1 + A i-1 B i-1. Cyin i-1 (hardware method of detection) or the software method of detection: Numbers have equal signs and resulting sign is different from number’s signs It is possible to have a CARRY out and not have an OVERFLOW !!!!!!!!!!!! Detection in Hardware is slightly Different because the result (Sum) bit is not used – Cyi-1 and Cyi-2 bits are used instead. CARRY (Addition or Subtraction) Sign Sign Carry In Carry Out A i-1 B i Cyin i Cyouti Cyouti= A i-1.B i-1 + (A i-1 Θ B i-1). Cyin i-1

Basic Operations in Two´s Complement: Addition and Subtraction Have the Same Treatment
A = -7 ; B= +8  A – B = A + (-B) = ? (4 bits) 1001 (-7) (-8) (CY=1) (-15) (Borrow=0) OVERFLOW A = +7 ; B = + 8  A - B = A + (-B) = ? 0111 (+7) (CY= 0) (-1) ( Borrow = 1) NO OVERFLOW A= +7 ; B = +6 A - B = A + (-B)? (-6) (CY= 1) (+1) ( Borrow = 0) NOTES: 1 – Multi operand arithmetic (eg. a 16-bit subtraction on a 8-bit microcontroller) demands the use of arithmetic operations which use the CARRY FLAG. 2 – The Hardware has only one flag, which is usually termed CARRY and instructions are usually termed ADDc, SUBc (or SUBnc). 3- Looking to the left side of this slide we can see that actually in subtraction, it has to be SUBTRACT on BORROW (propagate borrow then there is no CARRY). 4 – OVERFLOW (hardware detection) Overflow occurs when the sign bits are zero and there is a carry from the previous bits or when the sign bits are one and there is no carry from the previous bits: Ov = Xn-1.Yn-1.CY´n-1 + X´n-1.Y´n-1.CYn-1 5 – OVERFLOW (Software detection) If both numbers have the same signs and the result of the addition is of a different sign then an overflow occurred !!!

Multiplication in Two´s Complement
It can be easily performed in software by a sequence of multiply-add operations, but it takes many clock cycles. The number of clock cycles is directly proportional to the number of bits of the operands. The software algorithm can be improved as it will be seen in the next slide. If the Microprocessor has a Parallel Combinational Multiplier it can be done in one clock cycle (for single operands) or approximately 6 clock cycles for double-word operands (DSPs and other modern microprocessors have such a multiplier) X +

Optimized Multiplication in Software (http://www. convict
The algorithm is based on a particularity of binary notation. Imagine the multiplying of the base 10 numbers x10 = 7  and y10 = 5 x2 = 111 y2 = 101, which signifies y10 = 1*22 + 0*21 + 1*20 = 1* * *12 The distributive rule gives us: 111 * 101 = 111 * (1* *10 + 1*1) = 111*(1*100) + 111*(0*10) + 111*(1*1) The associative and commutative rules give us: = (111*100)*1 + (111*10)*0 + (111*1)*1 In binary notation, multiplying by factors of 2 is equivalent to shifting the number: = 11100* * *1 = = = 3510 Thus a simple algorithm may be written for multiplication: Operate the muliplication  z = x * y  z := 0 while y <> 0 do is the least significant bit of y 1 ? yes: z := z + x; no: continue; shift x one digit to the left; shift y one digit to the right; Let's now analyze the function MULV8 which may be accessed from within a program by preparing the temporary variables TEMPX and TEMPY, calling the function and finally retrieving the product from the variable RESULT.  For example, we want our program to compute:                     z := x * y In PIC-assembler this will sound:        MOVF   x,W MOVWF  TEMPX MOVF   y,W MOVWF  TEMPY CALL   MULV8 MOVF   RESULT,W MOVWF  z O tempo da Multiplicação (ou número de ciclos) vai depender da configuração dos bits do multipliando e do multiplicador. Por exemplo, a multiplicação por 3 é bastante rápida, pois “y” logo valerá zero e ele sai do loop.

Optimized Multiplication in Software – 8 bits
here is what the computer will do: clrf  means 'clear file' (in PIC-language a file is an 8-bit register) movf 'transfer value from file to itself (F) or the accumulator (W)‘ btfsc means 'skip next instruction if the designed bit is clear') bcf 'bit clear at file' Status,C = CLEAR THE CARRY-FLAG rrf 'rotate right file and store it to itself or the accumulator‘ rlf 'rotate left file and store...‘ movlw 'fill accumulator with litteral value‘ movwf 'transfer value from accumulator to file‘ btfss 'skip next instruction if designed bit is set' Status,Z = ZERO-FLAG SET? MULV8             CLRF RESULT MULU8LOOP             MOVF TEMPX,W             BTFSC TEMPY,0             ADDWF RESULT             BCF STATUS,C             RRF TEMPY,F             BCF STATUS,C             RLF TEMPX,F             MOVF TEMPY,F             BTFSS STATUS,Z             GOTO MULU8LOOP             RETURN

Multiplication for 16 bits
ADD16                        MOVF TEMPX16,W                        ADDWF RESULT16                        BTFSC STATUS,C                        INCF RESULT16_H                        MOVF TEMPX16_H,W                        ADDWF RESULT16_H                        RETURN MULV16                         CLRF RESULT16                        CLRF RESULT16_H MULU16LOOP                         BTFSC TEMPY16,0                         CALL ADD16                         BCF STATUS,C                         RRF TEMPY16_H,F                         RRF TEMPY16,F                         BCF STATUS,C                         RLF TEMPX16,F                         RLF TEMPX16_H,F                         MOVF TEMPY16,F                         BTFSS STATUS,Z                         GOTO MULU16LOOP                         MOVF TEMPY16_H,F                         BTFSS STATUS,Z                         GOTO MULU16LOOP                         RETURN

Fixed-Point Arithmetic
Representation Using 2’s Complement: Integer Part: 2m-1 positive values 2m negative values Fractional Part: [ 2-n, 1), with n bits Smallest Number: 2-n = Largest Number: ~ 1 Let us Suppose a Fractional Part with 10 bits The smallest fraction is: = 1/ 1024 ~ ~ 0.001 The largest fraction is: 1/21 + 1/ /210 = (210 –1)/210 = 1023/1024 ~ Where is the position of the decimal point ? Depends on the Application S m bits n bits 2 m n

Class Exercise - 2 Let us suppose an application (a software for construction engineers) that requires objects as small as 1mm, or as large as one medium size building, to be represented on the screen. Consider that the computer has a word length of 16 bits. Suppose also that the image used by the application can be rotated by very small degrees (in fractions or radians) to give the illusion of continuous movement (The viewer can navigate inside the building like in a video game). Devise and justify one possible fixed-point representation for this application that would be capable of satisfying the restrictions above. Now suppose a flight simulator. What distances and object sizes can be represented using the same word partition above ?

Class-Exercise 3 - Represent the following real numbers (in base 10) in two’s complement fixed-point arithmetic, with a total of eight bits, being four bits in the fractional part and perform the following operations: A= = B= = A + B = A – B = WHAT IF ?: A =+ 5.5 = B = +7.5 = A + B =

Addition and Subtraction Using Fixed-Point Arithmetic
Addition: It all happens as if the number being added was an integer number. The integer unit of the ALU is used. Let us consider a number in two’s complement with a total of 8 bits and 4 bits in the fractional part: A= = B= = A+B= = => (propagates from the fractional part into the integer part) A-B=A+(-B) = > A= = -B=-2.375= A+(-B)=+2.375= WHAT IF ?: A =+ 5.5 = B = +7.5 = A + B =+13.0=  OVERFLOW !!!!!!!!!!!!!!!!!!!

Class-Exercise 4 - Represent the following numbers in two’s complement fixed-point arithmetic, with a total of eight bits and four bits in the fractional part and obtain their product. The result has to fit into 8 bits using the same representation: A= = B= = A * B =

Fixed-Point Multiplication
Fixed-Point Arithmetic, together with Scaling, is Used to Deal with Integer and Fractional Values. Overflow can Occur and has to be Treated by Software Multiplication Example: A= = B= = A * B = ? NOTES: If x = ( ) Small Number  x2  UNDERFLOW !! y = ( ) Large Number  y2  OVERFLOW !! 15 A = Integer Fraction B = Integer Fraction 31 (A * B)32 = Integer H Integer L Fraction H Fraction L Overflow Underflow 15 SCALING (A * B)16 = Integer Fraction

Loosing Precision Because of Truncation
Consider an Application that uses two’s complement with a word length of 16 bits, 5 bits for the integer part and 10 bits for the fractional part. Consider that we have to multiply a distance of meters by the cosine of 450 (0.707). The correct value should be: * = 4.012 A= = (16 bits) B= = (16 bits) A * B = (32 bits) A * B = (scaled to 16 ) A * B = 3.918 Because of Truncation, The result Differs by 2.3%

Does the Order of Computation Matter?
Let us consider: a = 48221; b = and c = 33600, three values that we want to add and scale so that the result is translated into a domain with a 10-bit fractional part. Should we scale before and add afterwards, or vice-versa? Scaling Operands Before Performing Computations Result1 = int[a:1024] + int[b:1024] + int [c:1024] = 129 Scaling after adding the three values: Result2 = int[(a + b + c) : 1024] = 130 Result2 is more accurate than Result1 !! CONCLUSION: Sometimes we have to change the order of the operations to obtain better results.

Many Arithmetic Operations can be Speeded Up by using tables. E.g. trigonometric functions, division Software tricks (which would be very hard to implement in hardware) can be used in software to speed up arithmetic operations in embedded systems. One of the techniques is to analyse the operands and take a decision about how many loops to iterate.

Floating-Point x Fixed-Point
Floating-Point - provides large dynamic range and Fixed-point does not. What about precision ? A Floating-Point co-processor is very convenient for the programmer because he(she) does not have to worry about data ranges and alignment of the decimal point, neither overflow or underflow detection. In Fixed-Point, the programmer has to worry about all these problems. However, a floating-point unit demands a considerable silicon area and power, which is not commensurate with low-power embedded devices. In fact, most DSP processors have avoided floating-point units because of these restrictions. When there is no Floating-Point unit, most arithmetic and trigonometric functions have to be done in software.

Class Exercise 5 Consider the following problem where numbers are in two’s complement, 8 bits total and 4 bits in fractional part. A = 7.5 B = 0.25 C = 6.25 We want to do: (A + B + C) / 3.25 1 – Can I perform the addition and then divide the result – does the result of the addition fit into the word length? What can I do? What if: A = 0.25 B = 0.5 C = 0.125 We want to do: (A + B + C) / 1.25 * 6.0 2 – What happens if I perform the operations from left to right ? What can I do to avoid loosing significant bits during my operations ?

Block Floating Point Operations - I
Block Floating Point Provides Some of the Benefits of Floating Point Representation, but by Scaling Blocks of Numbers Rather than each Individual Number. Block Floating Point Numbers are Represented by the Full Word Length of a Fixed Point Number. If Any One of a Block of Numbers Becomes Too Large for the Available Word Length, the Programmer Scales Down all the Numbers in the Block, by Shifting Them to the Right. Example with word length = 8 bits. In the example, variables A, B, and C are the result of some computation and bits 8 and 9 do not fit into the original word length (overflow). To continue use them and maintain their relative values, they have to be scaled as a group (as a block), and undo the scaling operation later. Example: A = 10 | B = 00 | C = 01 | Similarly, if the Largest of a Block of Numbers is Small, the Programmer Scales up all the Numbers in the Block to Use the Full Available word length of the Mantissa. Example with word length = 8 bits. A, B and C are the result of some previous computation (where there was an underflow – in yellow). If we scale up the block of variables we do not loose the least significant bits. We have to undo the scale up later to bring the result to its proper domain. Example: A = | 1101 B = | 1000 C = | 1100

Block Floating Point Operations - II
This Approach is Used to Make the Most of the Mantissa of the Operands and also to Minimize Loss of Significant Bits During Arithmetic Operations with Scaling (Truncation). EXAMPLE: Normalize Operands (Left shift until MSB=1) Values Before Values Afterwards S S 1 1 1 Shared Exponent 1 1 1 1 1 1 1 1 1

Example 16-Bit word processor
After converting our Floating-Point Representation into a Fixed-Point Representation, suppose that we have: A = 5000 B = 9000 C = 8000 Suppose that we have to perform: (-B + SQRT (B * B - 4 * A * C) ) / (2 * A) The Intermediate results of (B*B) and (4*A *C) are too big to fit into a 16-bit word. However, it is expected that the result fits into a 16-bit word. Thus, we can use a block floating-point representation by shifting the data by the same amount and then perform the operations. A = (5000 >> 10) (divide by 210 or 1024) => Thus, exponent = 10 B = (9000 >> 10) C = (8000 >> 10) After the operation the result is shifted back by the amount of bits specified by the exponent

Normalization Operations for 2´s Complement Numbers
To use Block Floating Point (and also other arithmetic operations) Normalization Operations are Required Let us suppose 5-bit 2´s complement numbers. I have to calculate the normalization factor. How do I calculate it ? Let us try with the numbers +2 (00010)2 and –2 (11110)2. For positive numbers I do left shift 2 positions (x4) For negative numbers I do left shift 3 positions (x8) So I have two different normalization factors ? Does this work ? It works because after the arithmetic operations, the resulting number is right shifted by the same amount. Thus, calculate the number of left-shift positions (up to sign bit) for the most significant “1” for positive numbers and for the most significant “0” for negative numbers

Division

It is much more Difficult to Accelerate than Multiplication
Division It is much more Difficult to Accelerate than Multiplication Some Existing Methods of Implementation Are: Shift and Subtract, or Programmed Division (Similar to Paper and Pencil Method) Restoring Method Non-Restoring Method Division By Convergence – Obtain the Reciprocate (inverse) of the Divisor by some Convergence Method and Multiply it by the Dividend – Also a software method but it assumes that the Microprocessor has a hardware (very fast) multiplier. Successive Approximation Methods to Obtain the Reciprocate of the Divisor. Look-up table for the Reciprocate (Partial or Total) High-Radix Division – Mostly Methods for Implementing in Hardware

Programmed (Restoring) Division Example – Integer Numbers
======== INTEGER DIV ===== z (dend) = (117)10 24d = (10)10 ========================= s(0) 2s(0) -q3.24d {q3=1} s(1) 2s(1) q2.24d {q2=0} s(2) 2s(2) -q1.24d {q1=1} s(3) 2s(3) q0.24d {q0=1} s(4) s = 7 (remainder) q = 11 (quotient) This method assumes that the dividend has 2n bits and the divisor has n bits. The method is similar to the “paper and pencil” method. Negative numbers have to be converted to positive first. Firstly, compare the value of the divisor with the higher part of the dividend. If the divisor is larger, shift the dividend, subtract the divisor from the higher part and set the corresponding quotient bit to “1”. If the higher part of the shifted dividend is lower than the divisor, do not subtract anything from the higher part of the dividend and set the corresponding quotient bit to “0”. The number of iterations is equal to number of bits of the divisor. The remainder is left in the higher part of the dividend

Programmed (Restoring) Division Example – Fractional (Real) Numbers
======== FRACTIONAL DIV ===== z frac = d frac = ========================= s(0) 2s(0) -q-1d {q-1=1} s(1) 2s(1) -q-2d {q-2=0} s(2) 2s(2) -q-3d {q-3=1} s(3) 2s(3) -q-4d {q-4=1} s(4) sfrac (remainder) qfrac (quotient) For Fractional, or Real, Numbers, the procedure is exactly the same as for integer numbers. The only difference is that the remainder, which is left in the higher part of the shifted dividend, has to be transferred to the lower part of it to be correct. Them main problem with this method is that it requires a comparison (can be done by subtraction) operation on each step. This implies in more clock cycles than necessary. The next slide shows NonRestoring Division, which is simpler to implement, either in software or in Hardware.

Nonrestoring Unsigned Division
========================= z = (117)10 No overflow since in higher part: 24d = (10)10 (0111)two < (1010)two -24d s(0) 2s(0) Positive, +(-24d) so subtract s(1) 2s(1) Positive, so set q3=1 +(-24d) and subtract s(2) 2s(2) Negative, so set q2=0 +24d and add s(3) 2s(3) Positive, so set q1=1 s(4) Positive, so set q0=1 s = 7 (remainder) q = 11 (quotient) z = Dividend s = Remainder d = Divisor The big Advantage of this Method is that it is easy to test and decide if we have to add or subtract the quotient on each iteration. This means a simple implementation.

Programmed Division Using Left Shifts – Pseudo ASM
Using left shifts, divide unsigned 2k-bit dividend, z_high | z_low, storing the k-bit quotient and remainder. Registers: R0 holds Rc for Counter Rd for divisor Rs for z_high & rem Rq for z_low & quotient } {Load operands into regs Rd, Rs and Rq } div: load Rd with divisor load Rs with z_high load Rq with z_low {Check for exceptions } branch d_by_0 if Rd=R0 branch d_ovfl if Rs > Rd {Initialize Counter} load k into Rc {Begin division loop} d_loop: shift Rq left 1 {zero to LSB, MSB to cy} rotate Rs left 1 {cy to LSB, MSB to cy} skip if carry=1 branch no_sub if Rs < Rd sub Rd from Rs {2´s compl. Subtract} incr Rq {set quotient digit to1} No_sub: decr Rc {decrement counter by 1} branch d_loop if Rc  0 {Store the quotient and remainder } store Rq into quotient store Rs into remainder d_by_0: d_ovfl: d_done: Rs(p.rem) Rq(rem/quot) Rd(divisor) Even though it is an unsigned division, a 2’s complement subtraction instruction is required. Ignoring operand load and result store instructions, the function of a divide instruction is accomplished by executing between 6k+3 and 8k+3 machine instructions. For a 16-bit divisor this means well over 100 instructions on average.

Division Algorithm - 1 (http://www. sxlist

Division Algorithm – 2 http://www. convict